XRT83VSH28ES Exar, XRT83VSH28ES Datasheet - Page 42
XRT83VSH28ES
Manufacturer Part Number
XRT83VSH28ES
Description
Peripheral Drivers & Components - PCIs 8 CH E1 LIU SH (low cost version)
Manufacturer
Exar
Datasheet
1.XRT83VSH28ES.pdf
(75 pages)
Specifications of XRT83VSH28ES
Product Category
Peripheral Drivers & Components - PCIs
Rohs
yes
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XRT83VSH28
8-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT
The microprocessor interface can be accessed through a standard serial interface (BGA Package Only) or a
standard parallel microprocessor interface. The SER_PAR pin is used to select between the two. By default,
the chip is configured in the Parallel Microprocessor interace. For Serial communication, this pin must be
pulled “High”.
The serial microprocessor uses a standard 3-pin serial port with CS, SCLK, and SDI for programming the LIU.
Optional pins such as SDO, INT, and RESET allow the ability to read back contents of the registers, monitor
the LIU via an interrupt pin, and reset the LIU to its default configuration by pulling reset "Low" for more than
10S. A simplified block diagram of the Serial Microprocessor is shown in
The serial port requires 24 bits of data applied to the SDI (Serial Data Input) pin. The Serial Microprocessor
samples SDI on the rising edge of SCLK (Serial Clock Input). The data is not latched into the device until all 24
bits of serial data have been sampled. A timing diagram of the Serial Microprocessor is shown in
N
F
F
5.0 MICROPROCESSOR INTERFACE
5.1
5.1.1
OTE
IGURE
IGURE
: For applications without a free running SCLK, a minimum of 1 SCLK pulse must be applied when CS is “High”,
CS
SCLK
befrore pulling CS “Low”.
28. S
29. T
SDO
Serial Microprocessor Interface Block (BGA Package Only)
SDI
Serial Timing Information
IMING
IMPLIFIED
D
IAGRAM FOR THE
SER_PAR
HW/Host
B
ADDR[0] - ADDR[7]
LOCK
SCLK
SDI
CS
8-Bit Address
D
IAGRAM OF THE
S
ERIAL
1=Read
0=Write
RESET
M
R/W
Microprocessor
ICROPROCESSOR
S
ERIAL
Interface
Serial
7-Bit Don't Care
39
Don't Care
M
ICROPROCESSOR
I
NTERFACE
I
Figure
NTERFACE
DATA[0] - DATA[7]
DATA[0] - DATA[7]
8-Bit Data
Readback
SDO
28.
INT
Figure
REV. 2.0.0
29.
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