XRT83VSH28ES Exar, XRT83VSH28ES Datasheet - Page 64

• Manufacturer Part Number: XRT83VSH28ES
• Description: Peripheral Drivers & Components - PCIs 8 CH E1 LIU SH (low cost version)
• Manufacturer: Exar

Specifications of XRT83VSH28ES

• Product Category: Peripheral Drivers & Components - PCIs
• Rohs: yes

XRT83VSH28
8-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT
N
OTE
B
B
: The GIE bit in the global register 0xE0h must be set to "1" in addition to the individual register bits to enable the
D1
D0
D7
D6
D5
D4
D3
D2
IT
IT
interrupt pin.
LCV/OFIS
Reserved
Reserved
DMOIS
QRPD
RLOS
FLSIS
AISIS
N
N
AME
AME
T
T
ABLE
ABLE
Receiver Loss of Signal
The receiver loss of signal detection is always active regardless if
the interrupt generation is disabled. This bit indicates the RLOS
activity. An interrupt will not occur unless the RLOSIE is set to "1"
in the channel register 0x04h and GIE is set to "1" in the global
register 0xE0h.
0 = No Alarm
1 = An RLOS condition is present
Quasi Random Pattern Detection
The quasi random pattern detection is always active regardless if
the interrupt generation is disabled. This bit indicates that a QRPD
has been detected. An interrupt will not occur unless the QRPDIE
is set to "1" in the channel register 0x04h and GIE is set to "1" in
the global register 0xE0h.
0 = No Alarm
1 = A QRP is detected
This Register Bit is Not Used.
Digital Monitor Output Status
0 = No change
1 = Change in status occurred
FIFO Limit Status
0 = No change
1 = Change in status occurred
Line Code Violation / Overflow Status
0 = No change
1 = Change in status occurred
This Register Bit is Not Used.
Alarm Indication Signal Status
0 = No change
1 = Change in status occurred
28: M
29: M
ICROPROCESSOR
ICROPROCESSOR
C
C
HANNEL
HANNEL
F
F
0-7 (0
0-7 (0
UNCTION
UNCTION
R
R
61
EGISTER
EGISTER
X
X
05
06
H
H
-0
-0
X
X
0
0
75
76
X
X
05
06
H
H
)
)
H
H
B
B
IT
IT
D
D
ESCRIPTION
ESCRIPTION
Register
Register
Type
Type
RUR
RUR
RUR
RUR
RO
RO
(HW reset)
(HW reset)
REV. 2.0.0
Default
Default
Value
Value
0
0
0
0
0
0