XRT83SL30ES Exar, XRT83SL30ES Datasheet - Page 49

• Manufacturer Part Number: XRT83SL30ES
• Description: Peripheral Drivers & Components - PCIs 1 CHT1/E1 LIUSH
• Manufacturer: Exar

Specifications of XRT83SL30ES

• Product Category: Peripheral Drivers & Components - PCIs
• Rohs: yes

REV. 1.0.1
D3
D2
D1
D0
SINGLE-CHANNEL T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
JASEL1
JASEL0
FIFOS
JABW
T
ABLE
19: M
Jitter Attenuator select bit 1: The JASEL1 and JASEL0 bits are
used to disable or place the jitter attenuator in the transmit or
receive path.
Jitter Attenuator select bit 0: See description of bit D3 for the
function of this bit.
Jitter Attenuator Bandwidth Select:
In E1 mode, set this bit to "1" to select a 1.5Hz Bandwidth for the
Jitter Attenuator In E1 mode. The FIFO length will be automati-
cally set to 64 bits.
Set this bit to "0" to select 10Hz Bandwidth for the Jitter Attenua-
tor in E1 mode.
In T1 mode the Jitter Attenuator Bandwidth is permanently set to
3Hz, and the state of this bit has no effect on the Bandwidth.
FIFO Size Select: See table of bit D1 above for the function of
this bit.
Mode
E1
E1
E1
E1
ICROPROCESSOR
T1
T1
T1
T1
JASEL1
bit D3
0
0
1
1
JABW
bit D1
0
0
1
1
0
0
1
1
46
JASEL0
R
bit D2
EGISTER
0
1
0
1
FIFOS_n
bit D0
0
1
0
1
0
1
0
1
JA Disabled
JA in Transmit Path
JA in Receive Path
JA in Receive Path
#1
BIT DESCRIPTION
JA B-W
JA Path
1.5
1.5
Hz
10
10
3
3
3
3
FIFO
Size
32
64
32
64
32
64
64
64
XRT83SL30
R/W
R/W
R/W
R/W
0
0
0
0