XRT83SL30ES Exar, XRT83SL30ES Datasheet - Page 20

• Manufacturer Part Number: XRT83SL30ES
• Description: Peripheral Drivers & Components - PCIs 1 CHT1/E1 LIUSH
• Manufacturer: Exar

Specifications of XRT83SL30ES

• Product Category: Peripheral Drivers & Components - PCIs
• Rohs: yes

XRT83SL30
SINGLE-CHANNEL T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
FUNCTIONAL DESCRIPTION
The XRT83SL30 is a fully integrated single channel short-haul transceiver intended for T1, J1 or E1 systems.
Simplified block diagrams of the device are shown in
In T1 applications, the XRT83SL30 can generate five transmit pulse shapes to meet the short-haul Digital
Cross-connect (DSX-1) template requirement. It also provides programmable transmit output pulse generator
that can be used for output pulse shaping allowing performance improvement over a wide variety of conditions.
The operation and configuration of the XRT83SL30 can be controlled through a serial microprocessor Host
interface or, by Hardware control.
MASTER CLOCK GENERATOR
Using a variety of external clock sources, the on-chip frequency synthesizer generates the T1 (1.544MHz) or
E1 (2.048MHz) master clocks necessary for the transmit pulse shaping and receive clock recovery circuit.
There are two master clock inputs MCLKE1 and MCLKT1. In systems where both T1 and E1 master clocks are
available these clocks can be connected to the respective pins.
In systems that have only one master clock source available (E1 or T1), that clock should be connected to both
MCLKE1 and MCLKT1 inputs for proper operation. T1 or E1 master clocks can be generated from 8kHz,
16kHz, 56kHz, 64kHz, 128kHz and 256kHz external clocks under the control of CLKSEL[2:0] inputs according
to
N
OTE
Table
: EQC[4:0] determine the T1/E1 operating mode. See
1.
F
IGURE
F
IGURE
Input Clock Options
2.048MHz
1.544MHz
+/-50ppm
+/-50ppm
5. O
1.544MHz
2.048MHz
128kHz
256kHz
16kHz
56kHz
64kHz
4. T
8kHz
NE
WO
I
NPUT
I
NPUT
C
LOCK
C
LOCK
S
Two Input Clock Sources
MCLKE1
MCLKT1
OURCE
S
OURCE
MCLKE1
MCLKT1
One Input Clock Source
Figure
17
Table 5
MCLKOUT
MCLKOUT
1, Host mode and
for details.
Figure
1.544MHz
or
2.048MHz
1.544MHz
or
2.048MHz
2, Hardware mode.
REV. 1.0.1