XRT83SL30ES Exar, XRT83SL30ES Datasheet - Page 30

• Manufacturer Part Number: XRT83SL30ES
• Description: Peripheral Drivers & Components - PCIs 1 CHT1/E1 LIUSH
• Manufacturer: Exar

Specifications of XRT83SL30ES

• Product Category: Peripheral Drivers & Components - PCIs
• Rohs: yes

XRT83SL30
SINGLE-CHANNEL T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
TRANSMITTER
T
In Hardware mode, TXTSEL (Pin 45) can be tied “High” to select internal termination mode or tied “Low” for
external termination. In Host mode, bit 6 in the appropriate register is set “High” to select the internal
termination mode for the transmit channel, see
page
For internal termination, the transformer turns ratio is always 1:2. In internal mode, no external resistors are
used. An external capacitor of 0.68µF is used for proper operation of the internal termination circuitry, see
Figure
E
By default the XRT83SL30 is set for external termination mode at power up or at Hardware reset.
When external transmit termination mode is selected, the internal termination circuitry is disabled. The value of
the external resistors is chosen for a specific application according to the turns ratio selected by TRATIO (Pin
26) in Hardware mode or bit 0 in the appropriate register in Host mode, see
“Microprocessor Register #3 bit description,” on page
(100Ω) in the external termination mode.
termination mode.
RANSMIT
XTERNAL
45.
11.
T
T
ERMINATION
RANSMIT
F
IGURE
T
13. S
ERMINATION
M
XRT83SL30 LIU
TXTSEL
ODE
IMPLIFIED
0
1
TERSEL1
TRING
RRING
T
M
TTIP
RTIP
T
ABLE
0
0
1
1
ODE
ABLE
D
IAGRAM FOR
8: T
9: T
Figure 13
RANSMIT
ERMINATION
75 Ω
TX TERMINATION
TERSEL0
Table 19, “Microprocessor Register #1 bit description,” on
EXTERNAL
9.1 Ω
9.1 Ω
INTERNAL
E1
0
1
0
1
is a simplified block diagram for E1 (75Ω) in the external
T
27
IN
ERMINATION
E
S
XTERNAL
ELECT
49.
1:1
1:2
TERMINATION
Figure 12
C
C
ONTROL
T
100Ω
120Ω
110Ω
ONTROL
75Ω
ERMINATION
T
X
T
is a simplified block diagram for T1
RANSFORMER
1:2.45
75 Ω
75 Ω
1:2
M
ODE
Table 10
R
(RXTSEL= 0)
ATIO
and
REV. 1.0.1
Table 21,