S9S08DZ60F2MLH Freescale Semiconductor, S9S08DZ60F2MLH Datasheet - Page 58

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S9S08DZ60F2MLH

Manufacturer Part Number
S9S08DZ60F2MLH
Description
8-bit Microcontrollers - MCU M74K MASK ONLY-AUTO
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S9S08DZ60F2MLH

Rohs
yes
Core
HCS08
Processor Series
MC9S08DZ60
Data Bus Width
8 bit
Maximum Clock Frequency
40 MHz
Program Memory Size
60 KB
Data Ram Size
4 K
On-chip Adc
Yes
Operating Supply Voltage
2.7 V to 5.5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
LQFP-64
Mounting Style
SMD/SMT

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Chapter 4 Memory
4.5.6
An access error occurs whenever the command execution protocol is violated.
Any of the following specific actions will cause the access error flag (FACCERR) in FSTAT to be set.
FACCERR must be cleared by writing a 1 to FACCERR in FSTAT before any command can be processed.
58
Writing to a Flash address before the internal Flash and EEPROM clock frequency has been set by
writing to the FCDIV register.
Writing to a Flash address while FCBEF is not set. (A new command cannot be started until the
command buffer is empty.)
Writing a second time to a Flash address before launching the previous command. (There is only
one write to Flash for every command.)
Writing a second time to FCMD before launching the previous command. (There is only one write
to FCMD for every command.)
Writing to any Flash control register other than FCMD after writing to a Flash address.
Writing any command code other than the six allowed codes (0x05, 0x20, 0x25, 0x40, 0x41, or
0x47) to FCMD.
Writing any Flash control register other than to write to FSTAT (to clear FCBEF and launch the
command) after writing the command to FCMD.
The MCU enters stop mode while a program or erase command is in progress. (The command is
aborted.)
Writing the byte program, burst program, sector erase or sector erase abort command code (0x20,
0x25, 0x40, or 0x47) with a background debug command while the MCU is secured. (The
background debug controller can do blank check and mass erase commands only when the MCU
is secure.)
Writing 0 to FCBEF to cancel a partial command.
Access Errors
The FCBEF flag will not set after launching the sector erase abort command.
If an attempt is made to start a new command write sequence with a sector
erase abort operation active, the FACCERR flag in the FSTAT register will
be set. A new command write sequence may be started after clearing the
ACCERR flag, if set.
The sector erase abort command should be used sparingly since a sector
erase operation that is aborted counts as a complete program/erase cycle.
MC9S08DZ60 Series Data Sheet, Rev. 4
NOTE
NOTE
Freescale Semiconductor

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