S9S08DZ60F2MLH Freescale Semiconductor, S9S08DZ60F2MLH Datasheet - Page 270

• Manufacturer Part Number: S9S08DZ60F2MLH
• Description: 8-bit Microcontrollers - MCU M74K MASK ONLY-AUTO
• Manufacturer: Freescale Semiconductor

Specifications of S9S08DZ60F2MLH

• Rohs: yes
• Core: HCS08
• Processor Series: MC9S08DZ60
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 40 MHz
• Program Memory Size: 60 KB
• Data Ram Size: 4 K
• On-chip Adc: Yes
• Operating Supply Voltage: 2.7 V to 5.5 V
• Operating Temperature Range: - 40 C to + 125 C
• Package / Case: LQFP-64
• Mounting Style: SMD/SMT

Chapter 12 Freescale’s Controller Area Network (S08MSCANV1)
12.5.7.6
Interrupts are directly associated with one or more status flags in either the
Receiver Flag Register
(CANTFLG).” Interrupts are pending as long as one of the corresponding flags is set. The flags in
CANRFLG and CANTFLG must be reset within the interrupt handler to handshake the interrupt. The flags
are reset by writing a 1 to the corresponding bit position. A flag cannot be cleared if the respective
condition prevails.
12.5.7.7
The MSCAN can recover from stop or wait via the wake-up interrupt. This interrupt can only occur if the
MSCAN was in sleep mode (SLPRQ = 1 and SLPAK = 1) before entering power down mode, the wake-up
option is enabled (WUPE = 1), and the wake-up interrupt is enabled (WUPIE = 1).
12.6
12.6.1
The procedure to initially start up the MSCAN module out of reset is as follows:
If the configuration of registers which are writable in initialization mode needs to be changed only when
the MSCAN module is in normal mode:
270
1. Assert CANE
2. Write to the configuration registers in initialization mode
3. Clear INITRQ to leave initialization mode and enter normal mode
1. Bring the module into sleep mode by setting SLPRQ and awaiting SLPAK to assert after the CAN
2. Enter initialization mode: assert INITRQ and await INITAK
3. Write to the configuration registers in initialization mode
4. Clear INITRQ to leave initialization mode and continue in normal mode
Section 12.3.4.1, “MSCAN Receiver Flag Register
Receiver Interrupt Enable Register
bus becomes idle.
Initialization/Application Information
MSCAN initialization
Interrupt Acknowledge
Recovery from Stop or Wait
It must be guaranteed that the CPU clears only the bit causing the current
interrupt. For this reason, bit manipulation instructions (BSET) must not be
used to clear interrupt flags. These instructions may cause accidental
clearing of interrupt flags which are set after entering the current interrupt
service routine.
(CANRFLG)” or the
MC9S08DZ60 Series Data Sheet, Rev. 4
(CANRIER)”).
Section 12.3.6, “MSCAN Transmitter Flag Register
NOTE
(CANRFLG)” and
Section 12.3.4.1, “MSCAN
Section 12.3.5, “MSCAN
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