S9S08DZ60F2MLH Freescale Semiconductor, S9S08DZ60F2MLH Datasheet - Page 234

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S9S08DZ60F2MLH

Manufacturer Part Number
S9S08DZ60F2MLH
Description
8-bit Microcontrollers - MCU M74K MASK ONLY-AUTO
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S9S08DZ60F2MLH

Rohs
yes
Core
HCS08
Processor Series
MC9S08DZ60
Data Bus Width
8 bit
Maximum Clock Frequency
40 MHz
Program Memory Size
60 KB
Data Ram Size
4 K
On-chip Adc
Yes
Operating Supply Voltage
2.7 V to 5.5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
LQFP-64
Mounting Style
SMD/SMT

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Chapter 12 Freescale’s Controller Area Network (S08MSCANV1)
Read: Anytime
Write: Anytime when not in initialization mode
12.3.8
The CANTARQ register allows abort request of messages queued for transmission.
Read: Anytime
Write: Anytime when not in initialization mode
234
ABTRQ[2:0]
TXEIE[2:0]
Field
Field
2:0
2:0
Reset:
W
R
MSCAN Transmitter Message Abort Request Register (CANTARQ)
Transmitter Empty Interrupt Enable
0 No interrupt request is generated from this event.
1 A transmitter empty (transmit buffer available for transmission) event causes a transmitter empty interrupt
Abort Request — The CPU sets the ABTRQx bit to request that a scheduled message buffer (TXEx = 0) be
aborted. The MSCAN grants the request if the message has not already started transmission, or if the
transmission is not successful (lost arbitration or error). When a message is aborted, the associated TXE (see
Section 12.3.6, “MSCAN Transmitter Flag Register
Section 12.3.9, “MSCAN Transmitter Message Abort Acknowledge Register
interrupt occurs if enabled. The CPU cannot reset ABTRQx. ABTRQx is reset whenever the associated TXE flag
is set.
0 No abort request
1 Abort request pending
Figure 12-12. MSCAN Transmitter Message Abort Request Register (CANTARQ)
request. See
The CANTIER register is held in the reset state when the initialization mode
is active (INITRQ = 1 and INITAK = 1). This register is writable when not
in initialization mode (INITRQ = 0 and INITAK = 0).
The CANTARQ register is held in the reset state when the initialization
mode is active (INITRQ = 1 and INITAK = 1). This register is writable when
not in initialization mode (INITRQ = 0 and INITAK = 0).
0
0
7
= Unimplemented
Section 12.5.2.2, “Transmit
Table 12-13. CANTARQ Register Field Descriptions
Table 12-12. CANTIER Register Field Descriptions
6
0
0
MC9S08DZ60 Series Data Sheet, Rev. 4
0
0
5
Structures” for details.
NOTE
NOTE
4
0
0
Description
Description
(CANTFLG)”) and abort acknowledge flags (ABTAK, see
0
0
3
ABTRQ2
(CANTAAK)”) are set and a transmit
2
0
ABTRQ1
Freescale Semiconductor
0
1
ABTRQ0
0
0

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