S9S08SG8E2VTG Freescale Semiconductor, S9S08SG8E2VTG Datasheet - Page 94

• Manufacturer Part Number: S9S08SG8E2VTG
• Description: 8-bit Microcontrollers - MCU 9S08 UC W/ 8K 0.25UM SGF
• Manufacturer: Freescale Semiconductor

Specifications of S9S08SG8E2VTG

• Rohs: yes
• Core: S08
• Processor Series: MC9S08SG8
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 40 MHz
• Program Memory Size: 8 KB
• Data Ram Size: 8 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 2.7 V to 5.5 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: TSSOP-16
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 12
• Interface Type: SCI, SPI
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 16
• Number Of Timers: 2
• Program Memory Type: Flash
• Supply Voltage - Max: 5.5 V
• Supply Voltage - Min: 2.7 V

Chapter 6 Parallel Input/Output Control
6.6.3.5
6.6.3.6
90
PTCDS[3:0]
GNGP[7:1]
Reset:
Reset:
GNGEN
Field
Field
3:0
7:1
0
W
W
R
R
GNGPS7
Output Drive Strength Selection for Port C Bits — Each of these control bits selects between low and high
output drive for the associated PTC pin. For port C pins that are configured as inputs, these bits have no effect.
0 Low output drive strength selected for port C bit n.
1 High output drive strength selected for port C bit n.
Ganged Output Pin Select Bits— These write-once control bits selects whether the associated pin (see
Table
be controlled by the data, drive strength and slew rate settings for PTC0.
0 Associated pin is not part of the ganged output drive.
1 Associated pin is part of the ganged output drive. Requires GNGEN = 1.
Ganged Output Drive Enable Bit— This write-once control bit selects whether the ganged output drive feature
is enabled.
0 Ganged output drive disabled.
1 Ganged output drive enabled. PTC0 forced to output regardless of the value of PTCDD0 in PTCDD.
Port C Drive Strength Selection Register (PTCDS)
0
0
Ganged Output Drive Control Register (GNGC)
0
7
7
6-1for pins available) is enabled for ganged output. When GNGEN = 1, all enabled ganged output pins will
Figure 6-23. Drive Strength Selection for Port C Register (PTCDS)
GNGPS6
Figure 6-24. Ganged Output Drive Control Register (GNGC)
0
0
0
6
6
Table 6-22. PTCDS Register Field Descriptions
Table 6-23. GNGC Register Field Descriptions
MC9S08SG8 MCU Series Data Sheet, Rev. 7
GNGPS5
0
0
0
5
5
GNGPS4
0
0
0
4
4
Description
Description
GNGPS3
PTCDS3
3
0
3
0
GNGPS2
PTCDS2
0
0
2
2
GNGPS1
PTCDS1
Freescale Semiconductor
0
0
1
1
PTCDS0
GNGEN
0
0
0
0