S9S08SG8E2VTG Freescale Semiconductor, S9S08SG8E2VTG Datasheet - Page 28
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S9S08SG8E2VTG
Manufacturer Part Number
S9S08SG8E2VTG
Description
8-bit Microcontrollers - MCU 9S08 UC W/ 8K 0.25UM SGF
Manufacturer
Freescale Semiconductor
Datasheet
1.S9S08SG8E2VTG.pdf
(320 pages)
Specifications of S9S08SG8E2VTG
Rohs
yes
Core
S08
Processor Series
MC9S08SG8
Data Bus Width
8 bit
Maximum Clock Frequency
40 MHz
Program Memory Size
8 KB
Data Ram Size
8 KB
On-chip Adc
Yes
Operating Supply Voltage
2.7 V to 5.5 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
TSSOP-16
Mounting Style
SMD/SMT
A/d Bit Size
10 bit
A/d Channels Available
12
Interface Type
SCI, SPI
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
16
Number Of Timers
2
Program Memory Type
Flash
Supply Voltage - Max
5.5 V
Supply Voltage - Min
2.7 V
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EXTAL
* The fixed frequency clock (FFCLK) is internally
synchronized to the bus clock and must not exceed one
half of the bus clock frequency.
Chapter 1 Device Overview
1.3
Figure 1-2
inputs as shown. The clock inputs to the modules indicate the clock(s) that are used to drive the module
function.
The following defines the clocks used in this MCU:
24
XOSC
1 kHZ
LPO
ICS
•
•
•
•
•
•
•
•
XTAL
BUSCLK — The frequency of the bus is always half of ICSOUT.
ICSOUT — Primary output of the ICS and is twice the bus frequency.
ICSLCLK — Development tools can select this clock source to speed up BDC communications in
systems where the bus clock is configured to run at a very slow frequency.
ICSERCLK — External reference clock can be selected as the RTC clock source and as the
alternate clock for the ADC module.
ICSIRCLK — Internal reference clock can be selected as the RTC clock source.
ICSFFCLK — Fixed frequency clock can be selected as clock source for the TPM1, TPM2 and
MTIM modules.
LPOCLK — Independent 1-kHz clock source that can be selected as the clock source for the COP
and RTC modules.
TCLK — External input clock source for TPM1, TPM2 and MTIM and is referenced as TPMCLK
in TPM chapters.
System Clock Distribution
shows a simplified clock connection diagram. Some modules in the MCU have selectable clock
LPOCLK
ICSERCLK
ICSFFCLK
ICSIRCLK
ICSOUT
ICSLCLK
CPU
2
2
BUSCLK
Figure 1-2. System Clock Distribution Diagram
RTC
MC9S08SG8 MCU Series Data Sheet, Rev. 7
SYNC*
COP
TCLK
BDC
TPM1
FFCLK*
TPM2
ADC has min and max
frequency requirements.
See the ADC chapter
and electricals appendix
for details.
MTIM
ADC
SCI
IIC
SPI
Freescale Semiconductor
FLASH has frequency
requirements for program
and erase operation. See
the electricals appendix
for details.
FLASH
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