S9S12GN16F0VLF Freescale Semiconductor, S9S12GN16F0VLF Datasheet - Page 249
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S9S12GN16F0VLF
Manufacturer Part Number
S9S12GN16F0VLF
Description
16-bit Microcontrollers - MCU 16-bit16k Flash 2k RAM
Manufacturer
Freescale Semiconductor
Datasheet
1.S9S12G96F0CLL.pdf
(1292 pages)
Specifications of S9S12GN16F0VLF
Rohs
yes
Core
S12
Processor Series
MC9S12G
Data Bus Width
16 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
16 KB
Data Ram Size
1024 B
On-chip Adc
Yes
Operating Supply Voltage
3.13 V to 5.5 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
TSSOP-20
Mounting Style
SMD/SMT
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2.5.2.6
If the pin is used as an output this register turns off the active-high drive. This allows wired-or type
connections of outputs.
2.5.2.7
If the pin is used as an interrupt input this register serves as a mask to the interrupt flag to enable/disable
the interrupt.
2.5.2.8
If the pin is used as an interrupt input this register holds the interrupt flag after a valid pin event.
2.5.2.9
This register allows software re-configuration of the pinouts for specific peripherals in the 20 TSSOP
package only.
2.5.2.10
This register determines the package in use. Pre programmed by factory.
2.5.3
The following table summarizes the effect of the various configuration bits, that is data direction (DDR),
output level (IO), pull enable (PE), pull select (PS) on the pin function and pull device
The configuration bit PS is used for two purposes:
1.
Freescale Semiconductor
1. Configure the sensitive interrupt edge (rising or falling), if interrupt is enabled.
2. Select either a pullup or pulldown device if PE is active.
Pin Configuration Summary
Wired-Or Mode Register (WOMx)
Interrupt Enable Register (PIEx)
Interrupt Flag Register (PIFx)
Pin Routing Register (PRRx)
Package Code Register (PKGCR)
MC9S12G Family Reference Manual, Rev.1.23
Port Integration Module (S12GPIMV1)
1
.
251
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