S9S12GN16F0VLF Freescale Semiconductor, S9S12GN16F0VLF Datasheet - Page 157
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S9S12GN16F0VLF
Manufacturer Part Number
S9S12GN16F0VLF
Description
16-bit Microcontrollers - MCU 16-bit16k Flash 2k RAM
Manufacturer
Freescale Semiconductor
Datasheet
1.S9S12G96F0CLL.pdf
(1292 pages)
Specifications of S9S12GN16F0VLF
Rohs
yes
Core
S12
Processor Series
MC9S12G
Data Bus Width
16 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
16 KB
Data Ram Size
1024 B
On-chip Adc
Yes
Operating Supply Voltage
3.13 V to 5.5 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
TSSOP-20
Mounting Style
SMD/SMT
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A standard port pin has the following minimum features:
Optional features supported on dedicated pins:
2.1.4
2.2
This section lists and describes the signals that do connect off-chip.
Table 2-3
Freescale Semiconductor
•
•
•
•
•
•
•
Open drain for wired-or connections
Key-wakeup feature: External pin interrupt with glitch filtering, which can also be used for wakeup
from stop mode.
Control register for free-running clock outputs
Input/output selection
3.15 V - 5 V digital and analog input
Input with selectable pullup or pulldown device
PIM Routing - External Signal Description
shows the availability of I/O port pins for each group in the largest offered package option.
Block Diagram
n
1
0
Table 2-3. Port Pin Availability (in largest package) per Device
Port
A
B
Peripheral
Module
Ports
PIM
MC9S12G Family Reference Manual, Rev.1.23
Figure 2-1. Block Diagram
(100 pin)
G1
7-0
7-0
Pin Enable, Data
Pin Routing (20 TSSOP only)
Pin Enable, Data
Package Code
Device Group
(64 pin)
G2
-
-
Routing
PIM
Control
Control
(48 pin)
Port Integration Module (S12GPIMV1)
Data
Data
G3
-
-
Pin #0
Pin #n
159
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