S9S12GN16F0VLF Freescale Semiconductor, S9S12GN16F0VLF Datasheet - Page 150
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S9S12GN16F0VLF
Manufacturer Part Number
S9S12GN16F0VLF
Description
16-bit Microcontrollers - MCU 16-bit16k Flash 2k RAM
Manufacturer
Freescale Semiconductor
Datasheet
1.S9S12G96F0CLL.pdf
(1292 pages)
Specifications of S9S12GN16F0VLF
Rohs
yes
Core
S12
Processor Series
MC9S12G
Data Bus Width
16 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
16 KB
Data Ram Size
1024 B
On-chip Adc
Yes
Operating Supply Voltage
3.13 V to 5.5 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
TSSOP-20
Mounting Style
SMD/SMT
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Device Overview MC9S12G-Family
1.12.3
When a reset occurs, MCU registers and control bits are initialized. Refer to the respective block sections
for register reset states.
On each reset, the Flash module executes a reset sequence to load Flash configuration registers.
1.12.3.1
On each reset, the Flash module holds CPU activity while loading Flash module registers from the Flash
memory. If double faults are detected in the reset phase, Flash module protection and security may be
active on leaving reset. This is explained in more detail in the Flash module
1.12.3.2
If a reset occurs while any Flash command is in progress, that command will be immediately aborted. The
state of the word being programmed or the sector/block being erased is not guaranteed.
1.12.3.3
Refer to the PIM section for reset configurations of all peripheral module ports.
1.12.3.4
The RAM arrays are not initialized out of reset.
1.13
The COP time-out rate bits CR[2:0] and the WCOP bit in the CPMUCOP register at address 0x003C are
loaded from the Flash register FOPT. See
loaded from the Flash configuration field byte at global address 0x3_FF0E during the reset sequence.
152
COP Configuration
Effects of Reset
Flash Configuration Reset Sequence Phase
Reset While Flash Command Active
I/O Pins
RAM
FOPT Register
NV[2:0] in
Table 1-36. Initial COP Rate Configuration
MC9S12G Family Reference Manual,
000
001
010
011
100
101
110
111
Table 1-36
and
CPMUCOP Register
Table 1-37
CR[2:0] in
111
110
101
100
011
010
001
000
Rev.1.23
for coding. The FOPT register is
Section 29.1,
Freescale Semiconductor
“Introduction”.
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