SSTUA32866BHLF IDT, Integrated Device Technology Inc, SSTUA32866BHLF Datasheet - Page 22

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SSTUA32866BHLF

Manufacturer Part Number
SSTUA32866BHLF
Description
IC REGIST BUFFER 25BIT DDR 96BGA
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of SSTUA32866BHLF

Logic Type
1:1, 1:2 Configurable Registered Buffer with Parity
Supply Voltage
1.8V
Number Of Bits
25, 14
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
96-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SSTUA32866BHLF
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Part Number:
SSTUA32866BHLFT
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
1054A—01/28/05
(over recommended operating free-air temperature range, unless otherwise noted)
Notes:
(over recommended operating free-air temperature range, unless otherwise noted)
2. Guaranteed by design, not 100% tested in production.
Timing Requirements
SYMBOL
Switching Characteristics
Symbol
t
t
f
fmax
INACT
PDMSS
t
clock
t
t
t
t
t
t
t
t
t
t
ACT
t
t
PDM
t
t
su
su
su
su
su
PHL
PHL
PLH
W
H
PD
LH
HL
Clock frequency
Pulse duration, CK, CK HIGH or LOW
Differential inputs active time (See Notes 1 and 2)
Differential inputs inactive time (See Notes 1 and 3)
Setup time
Setup time
Setup time
Setup time
Setup time
Hold time
Hold time
1 - Guaranteed by design, not 100% tested in production.
2 - For data signal input slew rate of 1V/ns.
3 - For data signal input slew rate of 0.5V/ns and < 1V/ns.
4 - CLK/CLK# signal input slew rate of 1V/ns.
Max input clock frequency
Propagation delay, single
bit switching
Propagation delay
Low to High propagation
delay
High to low propagation
delay
Propagation delay
simultaneous switching
High to low propagation
delay
High to low propagation
delay
Low to High propagation
delay
Parameter
PARAMETERS
CK↑ to CK#↓ QN
CK↑ to CK#↓ to PPO
CK↑ to CK#↓ to QERR#
CK↑ to CK#↓ to QERR#
CK↑ to CK#↓ QN
Rst# ↓ to QN↓
Rst# ↓ to PPO↓
Rst# ↓ to QERR#↑
Measurement
Conditions
22
DSR# before CK↑, CK#↓,
CSR# high
CSR# before CK↑, CK#↓,
DCS# high
DCS# before CK↑, CK#↓,
CSR# low
DODT, DCKE and data before
CK↑, CK#↓
PAR_IN before CK↑, CK#↓
DCS#, DODT, DCKE and Q
after CK↑, CK#↓
PAR_IN after CK↑, CK#↓
MIN
410
1.1
0.5
1.2
1
-
MAX
1.9
1.8
2.4
3
2
3
3
3
ICSSSTUA32866B
Units
MHz
ns
ns
ns
ns
ns
ns
ns
ns
V
DD
0.50
0.50
MIN
0.7
0.7
0.5
0.5
0.5
1
-
-
-
= 1.8V ±0.1V
MAX
410
10
15
-
UNITS
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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