S912XEP100J5MAGR Freescale Semiconductor, S912XEP100J5MAGR Datasheet - Page 943
S912XEP100J5MAGR
Manufacturer Part Number
S912XEP100J5MAGR
Description
S912XEP Series 16 Bit 50 Mhz 1 MB Flash 64 KB Ram Microcontroller - LQFP-144
Manufacturer
Freescale Semiconductor
Datasheet
1.S912XEP100J5MAG.pdf
(1328 pages)
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25.4.2.16 Erase Verify D-Flash Section Command
The Erase Verify D-Flash Section command will verify that a section of code in the D-Flash user partition
is erased. The Erase Verify D-Flash Section command defines the starting point of the data to be verified
and the number of words.
Upon clearing CCIF to launch the Erase Verify D-Flash Section command, the Memory Controller will
verify the selected section of D-Flash memory is erased. The CCIF flag will set after the Erase Verify D-
Flash Section operation has completed.
Freescale Semiconductor
FERSTAT
Register
FSTAT
Table 25-65. Erase Verify D-Flash Section Command FCCOB Requirements
MGSTAT1
MGSTAT0
EPVIOLIF
ACCERR
Error Bit
Table 25-64. Full Partition D-Flash Command Error Handling
FPVIOL
CCOBIX[2:0]
000
001
010
MC9S12XE-Family Reference Manual , Rev. 1.23
Set if CCOBIX[2:0] != 010 at command launch
Set if a Load Data Field command sequence is currently active
Set if command not available in current mode (see
Set if an invalid DFPART or ERPART selection is supplied
None
Set if any errors have been encountered during the read
Set if any non-correctable errors have been encountered during the read
None
Global address [15:0] of the first word to be verified
0x10
Number of words to be verified
FCCOB Parameters
Global address [22:16] to
identify the D-Flash block
Error Condition
Chapter 25 256 KByte Flash Module (S12XFTM256K2V1)
Table
25-30)
943
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