S912XEP100J5MAGR Freescale Semiconductor, S912XEP100J5MAGR Datasheet - Page 454

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S912XEP100J5MAGR

Manufacturer Part Number
S912XEP100J5MAGR
Description
S912XEP Series 16 Bit 50 Mhz 1 MB Flash 64 KB Ram Microcontroller - LQFP-144
Manufacturer
Freescale Semiconductor
Datasheet

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
S912XEP100J5MAGR
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Chapter 10 XGATE (S12XGATEV3)
STW
Operation
RS ⇒ M[RB, #OFFS5]
RS ⇒ M[RB, RI]
RS ⇒ M[RB, RI];
RI–2 ⇒ RI;
Stores the content of register RS to memory.
CCR Effects
Code and CPU Cycles
1. If the same general purpose register is used as index (RI) and source register (RS), the unmodified content of the source
454
N:
Z:
V:
C:
STW RS, (RB, #OFFS5)
STW RS, (RB, RI)
STW RS, (RB, RI+)
STW RS, (RB, -RI)
N
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
register is written to the memory: RS ⇒ M[RB, RS–2]; RS–2 ⇒ RS
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
Not affected.
Not affected.
Not affected.
Not affected.
Z
V
Source Form
C
RI+2 ⇒ RI;
RS ⇒ M[RB, RI]
MC9S12XE-Family Reference Manual , Rev. 1.23
Address
Mode
IDO5
IDR+
-IDR
IDR
Store Word to Memory
1
0
0
0
0
1
1
1
1
0
1
1
1
1
1
1
1
1
1
1
1
Machine Code
RS
RS
RS
RS
RB
RB
RB
RB
RI
RI
RI
Freescale Semiconductor
OFFS5
STW
0
0
1
0
1
0
Cycles
PW
PW
PW
PW

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