S912XEP100J5MAGR Freescale Semiconductor, S912XEP100J5MAGR Datasheet - Page 627

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S912XEP100J5MAGR

Manufacturer Part Number
S912XEP100J5MAGR
Description
S912XEP Series 16 Bit 50 Mhz 1 MB Flash 64 KB Ram Microcontroller - LQFP-144
Manufacturer
Freescale Semiconductor
Datasheet

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The IDHITx indicators are always related to the message in the foreground buffer (RxFG). When a
message gets shifted into the foreground buffer of the receiver FIFO the indicators are updated as well.
16.3.2.13 MSCAN Reserved Register
This register is reserved for factory testing of the MSCAN module and is not available in normal system
operating modes.
Freescale Semiconductor
IDHIT[2:0]
IDAM[1:0]
Field
5-4
2-0
Identifier Acceptance Mode — The CPU sets these flags to define the identifier acceptance filter organization
(see
mode, no message is accepted such that the foreground buffer is never reloaded.
Identifier Acceptance Hit Indicator — The MSCAN sets these flags to indicate an identifier acceptance hit (see
Section 16.4.3, “Identifier Acceptance
IDHIT2
IDAM1
Section 16.4.3, “Identifier Acceptance
0
0
1
1
0
0
0
0
1
1
1
1
Table 16-18. CANIDAC Register Field Descriptions
Table 16-19. Identifier Acceptance Mode Settings
Table 16-20. Identifier Acceptance Hit Indication
IDHIT1
MC9S12XE-Family Reference Manual Rev. 1.23
IDAM0
0
1
0
1
0
0
1
1
0
0
1
1
Filter”).
IDHIT0
Chapter 16 Freescale’s Scalable Controller Area Network (S12MSCANV3)
Filter”).
0
1
0
1
0
1
0
1
Table 16-20
Description
Table 16-19
Identifier Acceptance Mode
Four 16-bit acceptance filters
Two 32-bit acceptance filters
Eight 8-bit acceptance filters
summarizes the different settings.
Filter closed
Identifier Acceptance Hit
summarizes the different settings. In filter closed
Filter 0 hit
Filter 1 hit
Filter 2 hit
Filter 3 hit
Filter 4 hit
Filter 5 hit
Filter 6 hit
Filter 7 hit
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