S912XEP100J5MAGR Freescale Semiconductor, S912XEP100J5MAGR Datasheet - Page 167
S912XEP100J5MAGR
Manufacturer Part Number
S912XEP100J5MAGR
Description
S912XEP Series 16 Bit 50 Mhz 1 MB Flash 64 KB Ram Microcontroller - LQFP-144
Manufacturer
Freescale Semiconductor
Datasheet
1.S912XEP100J5MAG.pdf
(1328 pages)
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2.3.84
Freescale Semiconductor
PER0AD1
PER1AD1
Address 0x027E
Address 0x027F
Write: Anytime.
Write: Anytime.
Field
Field
Reset
Reset
7-0
7-0
W
W
R
R
PER0AD17
PER1AD17
Port AD1 pull device enable—Enable pull devices on input pins
These bits configure whether a pull device is activated, if the associated pin is used as an input. This bit has no effect
if the pin is used as an output. Out of reset no pull device is enabled.
1 Pull device enabled.
0 Pull device disabled.
Port AD1 pull device enable—Enable pull devices on input pins
These bits configure whether a pull device is activated, if the associated pin is used as an input. This bit has no effect
if the pin is used as an output. Out of reset no pull device is enabled.
1 Pull device enabled.
0 Pull device disabled.
Port AD1 Pull Up Enable Register 0 (PER0AD1)
Port AD1 Pull Up Enable Register 1 (PER1AD1)
0
0
7
7
PER0AD16
PER1AD16
Figure 2-81. Port AD1 Pull Device Up Register 0 (PER0AD1)
Figure 2-82. Port AD1 Pull Up Enable Register 1 (PER1AD1)
0
0
6
6
Table 2-79. PER0AD1 Register Field Descriptions
Table 2-80. PER1AD1 Register Field Descriptions
MC9S12XE-Family Reference Manual , Rev. 1.23
PER0AD15
PER1AD15
0
0
5
5
PER0AD14
PER1AD14
0
0
4
4
Description
Description
PER0AD13
PER1AD13
3
0
3
0
Chapter 2 Port Integration Module (S12XEPIMV1)
PER0AD12
PER1AD12
0
0
2
2
PER0AD11
PER1AD11
Access: User read/write
Access: User read/write
0
0
1
1
PER0AD10
PER1AD10
0
0
0
0
167
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