S912XEP100J5MAGR Freescale Semiconductor, S912XEP100J5MAGR Datasheet - Page 1014
S912XEP100J5MAGR
Manufacturer Part Number
S912XEP100J5MAGR
Description
S912XEP Series 16 Bit 50 Mhz 1 MB Flash 64 KB Ram Microcontroller - LQFP-144
Manufacturer
Freescale Semiconductor
Datasheet
1.S912XEP100J5MAG.pdf
(1328 pages)
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Chapter 26 384 KByte Flash Module (S12XFTM384K2V1)
26.4.4
The Flash module is not affected if the MCU enters wait mode. The Flash module can recover the MCU
from wait via the CCIF interrupt (see
26.4.5
If a Flash command is active (CCIF = 0) or an EE-Emulation operation is pending when the MCU requests
stop mode, the current Flash operation will be completed before the CPU is allowed to enter stop mode.
26.5
The Flash module provides security information to the MCU. The Flash security state is defined by the
SEC bits of the FSEC register (see
register using data read from the security byte of the Flash configuration field at global address
0x7F_FF0F.
1014
Security
Wait Mode
Stop Mode
EPVIOLIE
PGMERIE
EPVIOLIF
PGMERIF
ERSERIE
ERSERIF
ERSVIE1
ERSVIF1
ERSVIE0
ERSVIF0
DFDIE
DFDIF
SFDIE
SFDIF
CCIE
CCIF
Figure 26-27. Flash Module Interrupts Implementation
MC9S12XE-Family Reference Manual , Rev. 1.23
Table
Section 26.4.3,
26-12). During reset, the Flash module initializes the FSEC
“Interrupts”).
Flash Command Interrupt Request
Flash Error Interrupt Request
Freescale Semiconductor
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