MN838850 PANASONIC [Panasonic Semiconductor], MN838850 Datasheet - Page 24

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MN838850

Manufacturer Part Number
MN838850
Description
Source Driver for LCD Panel Drive
Manufacturer
PANASONIC [Panasonic Semiconductor]
Datasheet
MN838850
Note) *1: The starting point is at the rise of the first clock cycle after the rise of the PRSL (PLSR) signal.
24
4. AC Characteristics at D
FY period
Clock high-level period
Clock low-level period
Data and INV setup time
Data and INV hold time
Start pulse setup time
Start pulse hold time
Start pulse low-level period
Start pulse high-level period
Carry signal delay time
Carry signal rise time
A signal low-level period
A signal start pulse setup time
Data input invalid time
Last data timing
LCD drive signal delay time
Electrical Characteristics (continued)
*2: Stipulated as the value until the drive output voltage reaches the target output voltage 20 mV (not including the
*3: See note 1. *3 in section 3. DC Characteristics for the analog output pin load.
deviation).
Parameter
* 1
* 1
VDD
* 2,3
2.7 V to 3.6 V, A
* 1
Symbol
t
t
t
t
t
t
t
t
t
wcH
wcL
t
t
wsH
t
wsL
t
t
hd1
hd2
wA
ng1
ng2
t
st1
st2
t
st3
d1
d2
p
c
VDD
D
D
CL
CL
A
VDD
VDD
VDD
14.5 V to 15.5 V, A
15 pF, D
15 pF, D
3.1 V to 3.6 V
2.7 V to 3.6 V
15 V
Conditions
VDD
VDD
3.1 V to 3.6 V
2.7 V to 3.6 V
VSS
D
VSS
0 V, T
Color TFT LCD Driver
Min
a
20
25
4
4
0
4
0
4
2
1
2
4
20 C to 75 C (continued)
Typ
64
1
Max
13
17
11
1
cycles
cycles
cycles
cycles
cycles
cycles
Clock
Clock
Clock
Clock
Clock
Clock
Unit
ns
ns
ns
ns
ns
ns
ns
ns
s
s

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