MN838850 PANASONIC [Panasonic Semiconductor], MN838850 Datasheet - Page 21

• Manufacturer Part Number: MN838850
• Description: Source Driver for LCD Panel Drive
• Manufacturer: PANASONIC [Panasonic Semiconductor]

Color TFT LCD Driver
Note) The absolute maximum ratings are limiting values under which the device will not be destroyed. Operation is not
1. Absolute Maximum Ratings at A
Possible periods of the clock stop
Functional Description (continued)
Start pulse
PLSR(RL "H")
PRSL(RL "L")
Electrical Characteristics
Digital system supply voltage
Analog system supply voltage
Digital input voltage
Digital output voltage
Analog output voltage
Operating temperature
Storage temperature
Analog input voltage
The possible periods of the clock stop in which clock has been stopped are shown below.
The clock signal must be provided during the period starting one clock cycle before the start pulse input and ending 5
clock cycles after the rise of the A signal.
However, if it is not the case that the first data is input with the next clock timing (T) after the input of the start pulse,
the clock may be stopped during the period between the start pulse input and the start of data input. The clock signal
may be stopped at either the high or low level.
guaranteed within these ranges.
A signal
Parameter
D
FY
XX
Period during which clock input is required
Symbol
VSS
T
D
A
V
V
T
V
V
T
VDD
VDD
opr
stg
O1
O2
I1
I2
0 V, D
1
Last data
First data
3 ··· N
VSS
0 V
0.3 to D
0.3 to A
0.3 to D
0.3 to A
40 to 110
0.3 to 7.0
0.3 to 17
20 to 75
Rating
1
VDD
VDD
VDD
VDD
2
3
0.3
0.3
0.3
0.3
4
which clock input
5
may be stopped
Period during
MN838850
Unit
V
V
V
V
V
V
C
C
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