P4C1026 PYRAMID [Pyramid Semiconductor Corporation], P4C1026 Datasheet

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P4C1026

Manufacturer Part Number
P4C1026
Description
ULTRA HIGH SPEED 256K x 4 STATIC CMOS RAM
Manufacturer
PYRAMID [Pyramid Semiconductor Corporation]
Datasheet
P4C1026
ULTRA HIGH SPEED 256K x 4
STATIC CMOS RAM
FEATURES
DESCRIPTION
The P4C1026 is a 1 Meg ultra high speed static RAM
organized as 256K x 4. The CMOS memory requires no clock
or refreshing and has equal access and cycle times. Inputs
and outputs are fully TTL-compatible. The RAM operates
from a single 5V±10% tolerance power supply. With battery
backup, data integrity is maintained for supply voltages down
to 2.0V.
FUNCTIONAL BLOCK DIAGRAM
Full CMOS, 6T Cell
High Speed (Equal Access and Cycle Times)
– 15/20/25/35 ns (Commercial/Industrial)
– 20/25/35 ns (Military)
Low Power
Single 5V±10% Power Supply
Data Retention with 2.0V Supply
Three-State Outputs
1
Access times as fast as 15 nanoseconds are available,
permitting greatly enhanced system speeds. CMOS is
utilized to reduce power consumption.
The P4C1026 is available in a 28-pin 300 mil and 400 mil SOJ
packages, as well as Ceramic DIP and LCC packages,
providing excellent board level densities.
PIN CONFIGURATION
TTL/CMOS Compatible Outputs
Fully TTL Compatible Inputs
Standard Pinout (JEDEC Approved)
– 28-Pin 300 mil SOJ
– 28-Pin 400 mil SOJ
– 28-Pin 400 mil Ceramic DIP
– 32-Pin Ceramic LCC
SOJ (J5, J7), DIP (C7)
Document # SRAM127 REV E
LCC(L13)
Revised April 2007

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P4C1026 Summary of contents

Page 1

... Access times as fast as 15 nanoseconds are available, permitting greatly enhanced system speeds. CMOS is utilized to reduce power consumption. The P4C1026 is available in a 28-pin 300 mil and 400 mil SOJ packages, as well as Ceramic DIP and LCC packages, providing excellent board level densities. PIN CONFIGURATION ...

Page 2

... HC Parameter Value Temperature Under –55 to +125 Bias Storage Temperature –65 to +150 Power Dissipation 1.0 DC Output Current 50 (4) = 25° 1.0MHz A Parameter Conditions Typ Input Capacitance IN Output Capacitance OUT P4C1026 Min Max 2.2 V +0.5 CC –0.5 0.8 (3) V –0 –0.5 (3) 0.2 –1.2 0.4 2.4 –5 +5 –5 +5 ___ ...

Page 3

... This parameter is guaranteed but not tested. † DATA RETENTION WAVEFORM Document # SRAM127 REV E Temperature Range Commercial Industrial Test Conditions Min 2.0V 2.0 CE ≥ V –0.2V ≥ –0. ≤ 0. § RC P4C1026 Unit –15 –20 –25 – Typ.* Max Unit CC CC 3.0V 2 ...

Page 4

... P4C1026 AC CHARACTERISTICS—READ CYCLE ( ± 10%, All Temperature Ranges) CC Sym. Parameter t Read Cycle Time RC t Address Access Time AA t Chip Enable Access Time AC t Output Hold from Address Change OH t Chip Enable to Output in Low Chip Disable to Output in High Chip Enable to Power Up Time ...

Page 5

... WE 13. Write Cycle Time is measured from the last valid address to the first and t . transitioning address (5,7) -20 -25 -35 Max Min Max Min Max (10,11) Page 5 of10 P4C1026 Unit ...

Page 6

... P4C1026 TIMING WAVEFORM OF WRITE CYCLE NO. 2 (CE AC TEST CONDITIONS Input Pulse Levels Input Rise and Fall Times Input Timing Reference Level Output Timing Reference Level Output Load See Figures 1 and 2 Figure 1. Output Load * including scope and test fixture. Note: Because of the ultra-high speed of the P4C1258, care must be taken when testing this device ...

Page 7

... ORDERING INFORMATION SELECTION GUIDE The P4C1026 is available in the following temperature, speed and package options. Temperature Package Range Commercial Plastic SOJ, 300 mil Plastic SOJ, 400 mil Industrial Plastic SOJ, 300 mil Plastic SOJ, 400 mil Military Ceramic DIP, 400 mil Temperature ...

Page 8

... P4C1026 SOJ SMALL OUTLINE IC PACKAGE J5 Pkg # # Pins 28 (300 mil) Symbol Min Max A 0.120 0.148 A1 0.078 - b 0.014 0.020 C 0.007 0.011 D 0.700 0.730 e 0.050 BSC E 0.335 BSC E1 0.292 0.300 E2 0.267 BSC Q 0.025 - SOJ SMALL OUTLINE IC PACKAGE Pkg # J7 # Pins 28 (400 mil) Symbol Min Max A 0 ...

Page 9

... D 0.442 0.458 D1 0.300 BSC D2 0.150 BSC D3 — 0.458 E 0.742 0.758 E1 0.400 BSC E2 0.200 BSC e 0.050 TYP 0.045 0.055 L1 0.045 0.055 L2 0.090 REF Document # SRAM127 REV E SIDEBRAZED DUAL IN-LINE PACKAGE RECTANGULAR LEADLESS CHIP CARRIER P4C1026 Page 9 of10 ...

Page 10

... P4C1026 REVISIONS DOCUMENT NUMBER: SRAM127 DOCUMENT TITLE: P4C1026 ULTRA HIGH SPEED 256K x 4 STATIC CMOS RAM ORIG. OF ISSUE REV. DATE CHANGE OR Oct-05 JDB A Aug-06 JDB B Oct-06 JDB C Dec-06 JDB D Mar-07 JDB E Apr-07 JDB Document # SRAM127 REV E DESCRIPTION OF CHANGE New Data Sheet ...

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