P4C1298 PYRAMID [Pyramid Semiconductor Corporation], P4C1298 Datasheet

no-image

P4C1298

Manufacturer Part Number
P4C1298
Description
ULTRA HIGH SPEED 64K x 4 STATIC CMOS RAM
Manufacturer
PYRAMID [Pyramid Semiconductor Corporation]
Datasheet
P4C1298/P4C1298L
ULTRA HIGH SPEED 64K x 4
STATIC CMOS RAM
FEATURES
DESCRIPTION
The P4C1298/L are a 262,144-bit ultra high speed static RAM
organized as 64K x 4. The CMOS memory requires no clock
or refreshing and has equal access and cycle times. Inputs
and outputs are fully TTL-compatible. The RAM operates
from a single 5V±10% tolerance power supply. With battery
backup, data integrity is maintained for supply voltages down
to 2.0V. Current drain is typically 10 µA from a 2.0V supply.
FUNCTIONAL BLOCK DIAGRAM
Full CMOS, 6T Cell
High Speed (Equal Access and Cycle Times)
– 15/20/25/35 ns (Commercial/Industrial)
– 15/20/25/35/45 ns (Military)
Low Power
Single 5V±10% Power Supply
Output Enable & Chip Enable control functions
1
Access times as fast as 15 nanoseconds are available,
permitting greatly enhanced system speeds. CMOS is
utilized to reduce power consumption.
The P4C1298 is available in a 28-pin 300 mil DIP or SOJ, as
well as a 28-pin 350x500 mil LCC package, providing
excellent board level densities.
PIN CONFIGURATION
Data Retention with 2.0V Supply
Three-State Outputs
TTL/CMOS Compatible Outputs
Fully TTL Compatible Inputs
Standard Pinout (JEDEC Approved)
– 28-Pin 300 mil DIP, SOJ
– 28-Pin 350x550 mil LCC
DIP (P5, C5)
SOJ (J5)
Document # SRAM135 REV OR
LCC (L5)
Revised April 2007

Related parts for P4C1298

P4C1298 Summary of contents

Page 1

... LCC Access times as fast as 15 nanoseconds are available, permitting greatly enhanced system speeds. CMOS is utilized to reduce power consumption. The P4C1298 is available in a 28-pin 300 mil DIP or SOJ, as well as a 28-pin 350x500 mil LCC package, providing excellent board level densities. PIN CONFIGURATION ...

Page 2

... Value Temperature Under –55 to +125 Bias Storage Temperature –65 to +150 Power Dissipation 1.0 DC Output Current 50 (4) = 25° 1.0MHz A Parameter Conditions Typ Input Capacitance IN Output Capacitance OUT P4C1298 P4C1298L Min Max Min Max 2.2 V +0.5 2 (3) (3) –0.5 0.8 –0.5 0.8 V –0.2 V +0.5 V –0.2 V ...

Page 3

... POWER DISSIPATION CHARACTERISTICS VS. SPEED Symbol Parameter I Dynamic Operating Current 5.5V. Tested with outputs open Max. Switching inputs are 0V and 3V DATA RETENTION CHARACTERISTICS (P4C1298L ONLY) Symbol Parameter V V for Data Retention Data Retention Current CCDR t Chip Deselect to CDR Data Retention Time † ...

Page 4

... P4C1298/L AC CHARACTERISTICS—READ CYCLE ( ± 10%, All Temperature Ranges) CC Sym. Parameter t Read Cycle Time RC t Address Access Time AA t Chip Enable Access Time AC t Output Hold from Address Change OH t Chip Enable to Output in Low Chip Disable to Output in High Output Enable Low to Data Valid ...

Page 5

... Document # SRAM135 REV CONTROLLED) (5,6) 7. Transition is measured ±200mV from steady state voltage prior to change with specified loading in Figure 1. This parameter is sampled and not 100% tested. 8. Read Cycle Time is measured from the last valid address to the first transitioning address. P4C1298/L Page ...

Page 6

... P4C1298/L AC CHARACTERISTICS - WRITE CYCLE ( ± 10%, All Temperature Ranges) CC Sym Parameter t Write Cycle Time WC t Chip Enable Time to End of Write CW t Address Valid to End of Write AW t Address Set-up Time AS t Write Pulse Width WP t Address Hold Time from End of Write AH t Data Valid to End of Write ...

Page 7

... Figure 1. Output Load * including scope and test fixture. Note: Because of the ultra-high speed of the P4C1298, care must be taken when testing this device; an inadequate setup can cause a normal functioning part to be rejected as faulty. Long high-inductance leads that cause supply bounce must be avoided by bringing the V ground planes directly up to the contactor fingers. A 0.01 µ ...

Page 8

... P4C1298/L ORDERING INFORMATION SELECTION GUIDE The P4C1298 is available in the following temperature, speed and package options. Temperature Package Range Commercial Plastic SOJ, 300 mil Industrial Plastic SOJ, 300 mil Military Ceramic DIP, 300 mil Temperature 28-Pin Ceramic LCC Military Ceramic DIP, 300 mil ...

Page 9

... BSC Q 0.025 - PLASTIC DUAL IN-LINE PACKAGE Pkg # P5 # Pins 28 (300 mil) Symbol Min Max A - 0.210 0.014 0.023 b2 0.045 0.070 C 0.008 0.014 D 1.345 1.400 E1 0.270 0.300 E 0.300 0.380 e 0.100 BSC eB - 0.430 L 0.115 0.150 0° 15° Document # SRAM135 REV OR P4C1298/L Page ...

Page 10

... P4C1298/L RECTANGULAR LEADLESS CHIP CARRIER L5 Pkg # # Pins 28 Symbol Min Max A 0.060 0.075 A1 0.050 0.065 B1 0.022 0.028 D 0.342 0.358 D1 0.200 BSC D2 0.100 BSC D3 - 0.358 E 0.540 0.560 E1 0.400 BSC E2 0.200 BSC E3 - 0.558 e 0.050 BSC h 0.040 REF j 0.020 REF L 0.045 0.055 L1 0.045 0.055 L2 0.075 ...

Page 11

... REVISIONS DOCUMENT NUMBER: SRAM135 DOCUMENT TITLE: P4C1298/P4C1298L ULTRA HIGH SPEED 64K x 4 STATIC CMOS RAM ORIG. OF ISSUE REV. DATE CHANGE OR Apr-07 JDB Document # SRAM135 REV OR DESCRIPTION OF CHANGE New Data Sheet P4C1298/L Page ...

Related keywords