P4C1026 PYRAMID [Pyramid Semiconductor Corporation], P4C1026 Datasheet - Page 5

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P4C1026

Manufacturer Part Number
P4C1026
Description
ULTRA HIGH SPEED 256K x 4 STATIC CMOS RAM
Manufacturer
PYRAMID [Pyramid Semiconductor Corporation]
Datasheet
Notes:
10. CE and WE must be LOW for WRITE cycle.
11. OE is LOW for this WRITE cycle to show t
12. If CE goes HIGH simultaneously with WE HIGH, the output remains
TIMING WAVEFORM OF READ CYCLE NO. 3 (CE CONTROLLED)
AC CHARACTERISTICS - WRITE CYCLE
(V
TIMING WAVEFORM OF WRITE CYCLE NO. 1 (WE
Document # SRAM127 REV E
Sym.
t
t
t
t
t
t
t
t
t
t
AW
AS
WP
WC
CW
AH
DW
WZ
DW
DH
CC
in a high impedance state
= 5V ± 10%, All Temperature Ranges)
Write Cycle Time
Address Set-up Time
Chip Enable Time to End of Write
Address Valid to End of Write
Write Pulse Width
Address Hold Time from End of Write
Data Valid to End of Write
Data Hold Time
Write Enable to Output in High Z
Output Active from End of Write
Parameter
WZ
and t
(2)
OW
.
Min
13
12
12
12
0
0
7
0
2
WE
WE
WE
WE CONTROLLED)
-15
13. Write Cycle Time is measured from the last valid address to the first
Max
transitioning address.
6
Min
20
15
15
15
0
2
0
8
0
-20
Max
8
Min
18
18
10
25
18
0
(5,7)
0
0
2
(10,11)
-25
Max
10
Min
15
35
25
25
25
0
3
0
0
-35
Max
15
Page 5 of10
P4C1026
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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