P4C1041 PYRAMID [Pyramid Semiconductor Corporation], P4C1041 Datasheet

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P4C1041

Manufacturer Part Number
P4C1041
Description
HIGH SPEED 256K x 16 (4 MEG) STATIC CMOS RAM
Manufacturer
PYRAMID [Pyramid Semiconductor Corporation]
Datasheet
P4C1041
HIGH SPEED 256K x 16 (4 MEG)
STATIC CMOS RAM
FEATURES
DESCRIPTION
The P4C1041 is a 262,144 words by 16 bits high-speed
CMOS static RAM. The CMOS memory requires no
clocks or refreshing, and has equal access and cycle
times. Inputs are fully TTL-compatible. The RAM oper-
ates from a single 5.0V ± 10% tolerance power
supply.
Access times as fast as 10 nanoseconds permit greatly
enhanced system operating speeds. CMOS is utilized
to reduce power consumption to a low level. The P4C1041
is a member of a family of PACE RAM™ products offer-
ing fast access times.
FUNCTIONAL BLOCK DIAGRAM
High Speed (Equal Access and Cycle Times)
— 10/12/15/20 ns (Commercial)
— 12/15/20 ns (Industrial)
Low Power
Single 5.0V ± 10% Power Supply
2.0V Data Retention
1
The P4C1041 device provides asynchronous operation
with matching access and cycle times. Memory loca-
tions are specified on address pins A
accomplished by device selection (CE and output en-
abling (OE) while write enable (WE) remains HIGH. By
presenting the address under these conditions, the data
in the addressed memory location is presented on the
data input/output pins. The input/output pins stay in the
HIGH Z state when either CE or OE is HIGH or WE is
LOW.
Package options for the P4C1041 include 44-pin SOJ
and TSOP packages.
Easy Memory Expansion Using CE
Inputs
Fully TTL Compatible Inputs and Outputs
Advanced CMOS Technology
Fast t
Automatic Power Down when deselected
Packages
—44-Pin SOJ, TSOP II
OE
PIN CONFIGURATION
Document # SRAM133 REV OR
1519B
TSOP II
SOJ
Revised January 2007
0
CE
CE and OE
CE
to A
CE
17
. Reading is
OE
OE
OE
OE

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P4C1041 Summary of contents

Page 1

... Low Power Single 5.0V ± 10% Power Supply 2.0V Data Retention DESCRIPTION The P4C1041 is a 262,144 words by 16 bits high-speed CMOS static RAM. The CMOS memory requires no clocks or refreshing, and has equal access and cycle times. Inputs are fully TTL-compatible. The RAM oper- ates from a single 5.0V ± 10% tolerance power supply ...

Page 2

... V IN Parameter Value Temperature Under –55 to +125 Bias Storage Temperature –65 to +150 DC Output Current 20 (4) = 25° 1.0MHz A Parameter Conditions Typ. Input Capacitance Output Capacitance OUT P4C1041 Min Max V +0.5 2.2 CC 0.8 –0.5 (3) 0.4 2 ___ 40 ___ 6 Page Unit °C °C mA ...

Page 3

... Commercial 240 210 N/A Industrial 240 (2) -10 -12 Min Max Min Max P4C1041 Unit –15 –20 mA 190 170 190 mA 210 , -15 -20 Max Min Min Max ...

Page 4

... P4C1041 TIMING WAVEFORM OF READ CYCLE NO. 1 TIMING WAVEFORM OF READ CYCLE NO. 2 (OE Notes: 1. Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied ...

Page 5

... Document # SRAM133 REV OR (2) -10 -12 Min Max Min Max CONTROLLED P4C1041 -15 -20 Unit Max Min Min Max ...

Page 6

... P4C1041 TIMING WAVEFORM OF WRITE CYCLE NO. 2 (BLE TIMING WAVEFORM OF WRITE CYCLE NO. 3 (WE Document # SRAM133 REV OR BLE OR BHE BLE BLE BHE BHE CONTROLLED) BHE BLE BHE CONTROLLED LOW) Page ...

Page 7

... Figure 1. Output Load * including scope and test fixture. Note: Because of the ultra-high speed of the P4C1041, care must be taken when testing this device; an inadequate setup can cause a normal functioning part to be rejected as faulty. Long high-inductance leads that cause supply bounce must be avoided by bringing the V ground planes directly up to the contactor fingers. A 0.01 µ ...

Page 8

... P4C1041 ORDERING INFORMATION Document # SRAM133 REV OR Page ...

Page 9

... BSC E 0.435 0.445 E1 0.395 0.405 E2 0.370 BSC Q 0.025 - TSOP II THIN SMALL OUTLINE PACKAGE Pkg # T2 # Pins 44 Symbol Min Max A 0.039 0.047 A 0.033 0.045 2 b 0.012 0.016 D 0.396 0.404 E 0.721 0.729 e 0.0315 BSC H 0.462 0.470 D Document # SRAM133 REV OR P4C1041 Page ...

Page 10

... P4C1041 REVISIONS DOCUMENT NUMBER: SRAM133 DOCUMENT TITLE: P4C1041 HIGH SPEED 256K MEG) STATIC CMOS RAM ORIG. OF ISSUE REV. DATE CHANGE OR Jan-07 JDB Document # SRAM133 REV OR DESCRIPTION OF CHANGE New Data Sheet Page ...

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