PE3240EK PEREGRINE [Peregrine Semiconductor Corp.], PE3240EK Datasheet
PE3240EK
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PE3240EK Summary of contents
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Product Description Peregrine’s PE3240 is a high performance integer-N PLL capable of frequency synthesis up to 2.2 GHz. The superior phase noise performance of the PE3240 is ideal for applications such as wireless local loop basestations, LMDS systems and other ...
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Figure 2. Pin Configuration (Top View Enh 2 S_WR 3 Sdata 4 Sclk 5 GND 6 FSELS 7 E_WR Table 1. Pin Descriptions Pin No. Pin Name Type 1 V ...
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PE3240 Product Specification Table 1. Pin Descriptions (continued) Pin No. Pin Name Type 17 PD_D Output PD_D pulses down when f PD_U PD_U pulses down when f 18 Output 19 GND Ground Input Reference frequency input. r Note ...
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Table 5. DC Characteristics: V Symbol Parameter Operational supply current Prescaler enabled Digital Inputs: S_WR, Sdata, Sclk V High level input voltage IH V Low level input voltage IL I High level input current IH I Low level ...
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PE3240 Product Specification Table 6. AC Characteristics: V Symbol Parameter Control Interface and Latches (see Figures Serial data clock frequency Clk t Serial clock HIGH time ClkH t Serial clock LOW time ClkL t Sdata set-up time ...
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Typical Performance Data (V DD Figure 4. Typical RF Input Sensitivity 0 -5 -10 -15 -20 -25 -30 0 500 Figure 5. Typical Phase Noise Performance -60 -70 -80 -90 -100 -110 -120 -130 100 1000 ©2006 Peregrine Semiconductor Corp. ...
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PE3240 Product Specification Functional Description The PE3240 consists of a prescaler, counters, a phase detector and control logic. The dual modulus prescaler divides the VCO frequency by either 10 or 11, depending on the value of the modulus select. Counters ...
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Main Counter Chain Normal Operating Mode Setting the Pre_en control bit “low” enables the ÷10/11 prescaler. The main counter chain then divides the RF input frequency (F derived from the values in the “M” and “A” counters. In this mode, ...
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PE3240 Product Specification Table 7. Primary Register Programming Interface Mode Enh Serial *Serial data clocked serially on Sclk rising edge while E_WR “low” and captured in secondary ...
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Enhancement Register The functions of the enhancement register bits are shown below with all bits active “high”. Table 9. Enhancement Register Bit Functionality Bit Function Bit 0 Reserved** Bit 1 Reserved** Bit 2 f output Drives the M counter output ...
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... A - 6.50±0.10 0.10 C 0.30 MAX 0. FRONT VIEW Table 10. Ordering Information Order Code Part Marking 3240-11 PE3240 PE3240-20TSSOP-74A 3240-12 PE3240 PE3240-20TSSOP-2000C 3240-00 PE3240EK PE3240-20TSSOP-EVAL KIT Document No. 70-0034-02 │ www.psemi.com 4.40±0. . 0.325 0.90±0.05 1.10 MAX - C - 0.10±0.05 Description ...
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Sales Offices The Americas Peregrine Semiconductor Corporation 9450 Carroll Park Drive San Diego, CA 92121 Tel 858-731-9400 Fax 858-731-9499 Europe Peregrine Semiconductor Europe Bâtiment Maine 13-15 rue des Quatre Vents F-92380 Garches, France Tel: +33-1-47-41-91-73 Fax : +33-1-47-41-91-73 Space and ...