PE3282A PEREGRINE [Peregrine Semiconductor Corp.], PE3282A Datasheet

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PE3282A

Manufacturer Part Number
PE3282A
Description
1.1 GHz/510 MHz Dual Fractional-N PLL IC for Frequency Synthesis
Manufacturer
PEREGRINE [Peregrine Semiconductor Corp.]
Datasheet
Applications
• Cellular handsets
• Cellular base stations
• Spread-spectrum radio
• Cordless phones
• Pagers
Description
The PE3282A is a dual fractional-N phase-locked loop integrated circuit
designed for frequency synthesis and fabricated on Peregrine’ s patented
UTSi® CMOS process. Each PLL includes a prescaler, phase detector, charge
pump and on-board fractional spur compensation. The 32/33 RF prescaler
(PLL1) operates up to 1.1 GHz and the
16/17 IF prescaler (PLL2) operates up to 510 MHz.
The PE3282A provides fractional-N division with power-of-two
denominator values up to 32. This allows comparison frequencies up to 32
times the channel spacing, providing a lower phase-noise floor than
integer PLLs.
Figure 1. PE3282A Block Diagram
Peregrine Semiconductor Corporation
Clock
Data
Gnd
Gnd
Gnd
f
f
f
f
in
in
in
LE
in
f
2
2
1
1
r
12
13
11
14
16
15
6
5
7
8
9
Amp
Ref
Prescaler
Prescaler
32/33
16/17
21-Bit Serial Control
®
Interface
Reference
Reference
Divider
Divider
9-Bit
9-Bit
Main Divider
Fractional-N
Fractional-N
Main Divider
19-Bit
18-Bit
Detector
Detector
Phase
Phase
Multiplexer
Fractional Spur
Fractional Spur
Compensation
Compensation
Final Datasheet
PE3282A
1.1 GHz/510 MHz
Dual Fractional-N
PLL IC for
Frequency Synthesis
Features
• Modulo-32 fractional-N main counters
• On-board fractional spur compensation:
• Improved phase noise compared to
• Low power—8.5 mA at 3 V
• Integrated 1.1 GHz ÷ 32/33 prescaler
• Integrated 510 MHz ÷ 16/17 prescaler
Charge
Charge
no tuning required, stable over
temperature
integer-N architectures
Pump
Pump
6175 Nancy Ridge Drive, San Diego, CA 92121
Tel (619) 455-0660 Fax (619) 455-0770
http://www.peregrine-semi.com
10
18
20
17
19
3
1
2
4
CP1
f
V
V
Gnd
CP2
V
Gnd
V
o
DD
DD
DD
DD
LD
Document 70/0002~07B

Related parts for PE3282A

PE3282A Summary of contents

Page 1

... Cordless phones • Pagers Description The PE3282A is a dual fractional-N phase-locked loop integrated circuit designed for frequency synthesis and fabricated on Peregrine’ s patented UTSi® CMOS process. Each PLL includes a prescaler, phase detector, charge pump and on-board fractional spur compensation. The 32/33 RF prescaler (PLL1) operates ...

Page 2

... PE3282A Figure 2. Pin Configuration TSSOP (JEDEC MO-153-AC) Table 1. PE3282A Pin Description Pin No. Pin Name Type 1 V (Note (Note CP1 Output 4 Gnd Input Input in 7 Gnd 8 f Input r 9 Gnd Output o 11 Clock Input 12 Data ...

Page 3

Ratings and Operating Ranges Table 2. Absolute Maximum Ratings Symbol Parameter/Conditions V Supply voltage DD V Voltage on any input into any input or output I T Storage temperature range stg Table 3. Operating Ranges Symbol Parameter/Conditions ...

Page 4

... PE3282A Table 5. DC Characteristics V = 3.0 V, –40° C < T < 85° C, unless specified DD A Symbol Parameter I Operational supply current; DD PLL1 (RF) enabled PLL2 (IF) enabled PLL1 and PLL2 enabled I Total standby current stby Digital inputs: Clock, Data High level input voltage IH V Low level input voltage ...

Page 5

Table 6. AC Characteristics V = 3.0 V, –40° C < T < 85° C, unless specified DD A Symbol Parameter Serial Control Interface (see Figure 3) f Serial data clock frequency Clock t Serial clock HIGH time ClockH t ...

Page 6

... Serial input data is clocked on the rising edge of Clock, MSB first. The last two bits are the address bits that determine the register address. Data is transferred into the counters as shown in Table 7, PE3282A Register Set. If the f LD pin is configured as data out, then the contents ...

Page 7

... Table 7. PE3282A Register Set Test PLL2 Synthesizer control Reserved PLL2 Main counter M divide ratio 2 Res PLL1 Synthesizer control Reserved C 14 PLL1 Main counter M divide ratio ...

Page 8

... If an inverting active loop filter is used the relationship is also inverted. • When VCO1 (RF) slope is positive like (1), C • When VCO1 (RF) slope is negative like (2), C • When VCO2 (IF) slope is positive like (1), C • When VCO2 (IF) slope is negative like (2), C Table 8. PE3282A Counter Programming Example Divide MSB Value S ...

Page 9

Table 10 Programming Truth Table don’t care condition Output State Disabled (Note 1) PLL1 Lock detect (Note 2) (LD1) PLL2 Lock detect (Note 2) (LD2) PLL1/PLL2 Lock detect (Note 2) PLL1 Reference ...

Page 10

... PE3282A Phase Comparator Characteristics PLL1 has the timing relationships shown below for f internal PLL1 charge pump to source current and DOWN1 directs the PLL1 internal charge pump to sink current LOW, UP1 and DOWN1 are interchanged. PLL2 has the timing relationships shown below for f internal PLL2 charge pump to source current and DOWN2 directs the PLL2 internal charge pump to sink current ...

Page 11

Figure 7. Typical Application Example .01 µF 220 pF PLL1 (RF) VCO OUT R2 (Note 1) C2 Reference Input Output Table 11. PLL1 (RF) Operating Loop Filter Conditions Values (Note 948.075 MHz R2 = ...

Page 12

... PE3282A Mechanical Information Figure 8. Package Dimensions: TSSOP (JEDEC MO-153-AC) 6.50 ±0.10 20 Index 1 0.65 TYP 1.20 MAX Seated Height 0.05 MIN Stand Off 11 6.40 ±0.30 (dimensions in millimeters) 4.40 ±0.10 10 0.60 ±0.15 Document 70/0002~07B ...

Page 13

... Ordering Information Peregrine Semiconductor Corp. standard products are often available in several packages and performance ranges. Part numbers for ordering the various configurations are defined as follows: Table 13.Valid ordering number combinations for PE3282A: Order Code Part Marking 3282-11 PE3282A 3282-12 PE3282A 3282-00 ...

Page 14

... UTSi, the Peregrine logotype, Microcommunicator, SEL Safe, and Peregrine Semiconductor Corporation are registered trademarks of Peregrine Semiconductor Corporation. PE3282A and all PE product prefixes are trademarks of Peregrine Semiconductor Corporation. Copyright © 1998 Peregrine Semiconductor Corporation. All rights reserved. ...

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