pe3240 Peregrine Semiconductor Corp., pe3240 Datasheet
pe3240
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pe3240 Summary of contents
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... Product Description Peregrine’s PE3240 is a high performance integer-N PLL capable of frequency synthesis up to 2.2 GHz. The superior phase noise performance of the PE3240 is ideal for applications such as wireless local loop basestations, LMDS systems and other demanding terrestrial systems. The PE3240 features a 10/11 dual modulus prescaler, counters and a phase comparator as shown in Figure 1 ...
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... Same as pin 1. DD ©2006 Peregrine Semiconductor Corp. All rights reserved. Page Figure 3. Package Type 20-lead TSSOP GND 18 PD_U 17 PD_D Dout Cext 12 GND Description Product Specification Document No. 70-0034-02 │ UltraCMOS™ RFIC Solutions PE3240 ...
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... PE3240 Product Specification Table 1. Pin Descriptions (continued) Pin No. Pin Name Type 17 PD_D Output PD_D pulses down when f PD_U PD_U pulses down when f 18 Output 19 GND Ground Input Reference frequency input. r Note 1: V pins 1, 9, and 16 are connected by diodes and must be supplied with the same positive voltage level. ...
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... Min Typ Max -100 0 0 +100 -1 +100 -100 0 0 0.4 DD 0.4 Document No. 70-0034-02 │ UltraCMOS™ RFIC Solutions PE3240 Units µA µ µA µ µA µA µA µ ...
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... PE3240 Product Specification Table 6. AC Characteristics: V Symbol Parameter Control Interface and Latches (see Figures Serial data clock frequency Clk t Serial clock HIGH time ClkH t Serial clock LOW time ClkL t Sdata set-up time to Sclk rising edge DSU t Sdata hold time after Sclk rising edge ...
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... Peregrine Semiconductor Corp. All rights reserved. Page 3 25°C) A 1000 1500 2000 2500 Frequency (MHz) 10000 100000 Frequency Offset (Hz) Product Specification 3000 Frequency = 1300 MHz Reference = 10 MHz Loop Band Width = 100 kHz Comparison Frequency = 1.25 MHz 1000000 Document No. 70-0034-02 │ UltraCMOS™ RFIC Solutions PE3240 ...
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... PE3240 Product Specification Functional Description The PE3240 consists of a prescaler, counters, a phase detector and control logic. The dual modulus prescaler divides the VCO frequency by either 10 or 11, depending on the value of the modulus select. Counters “R” and “M” divide the reference and prescaler output, respectively, by integer values stored in a 20-bit register. additional counter (“ ...
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... E_WR, the data provide control bits as shown in Table 8 on page 9 will have their bit functionality enabled by asserting the Enh input “low” (3) (4) Product Specification ) directly to the phase r , are clocked serially into the primary Document No. 70-0034-02 │ UltraCMOS™ RFIC Solutions PE3240 ...
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... PE3240 Product Specification Table 7. Primary Register Programming Interface Mode Enh Serial *Serial data clocked serially on Sclk rising edge while E_WR “low” and captured in secondary register on S_WR rising edge. MSB (first in) Table 8. Enhancement Register Programming ...
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... Connecting Cext to an external shunt capacitor provides low pass filtering of this signal. Cext also drives the input of an internal inverting comparator with an open drain output. Thus “AND” function of PD_U and PD_D Product Specification Document No. 70-0034-02 │ UltraCMOS™ RFIC Solutions PE3240 ...
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... A - 6.50±0.10 0.10 C 0.30 MAX 0. FRONT VIEW Table 10. Ordering Information Order Code Part Marking 3240-11 PE3240 PE3240-20TSSOP-74A 3240-12 PE3240 PE3240-20TSSOP-2000C 3240-00 PE3240EK PE3240-20TSSOP-EVAL KIT Document No. 70-0034-02 │ www.psemi.com 4.40±0. . 0.325 0.90±0.05 1.10 MAX - C - 0.10±0.05 Description 12 ...
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... Peregrine assumes no liability for damages, including consequential or incidental damages, arising out of the use of its products in such applications. The Peregrine name, logo, and UTSi are registered trademarks and UltraCMOS and HaRP are trademarks of Peregrine Semiconductor Corp. Document No. 70-0034-02 │ UltraCMOS™ RFIC Solutions PE3240 Product Specification ...