DM9008AEP_06 DAVICOM [Davicom Semiconductor, Inc.], DM9008AEP_06 Datasheet - Page 36

• Manufacturer Part Number: DM9008AEP_06
• Description: Ethernet Controller with General Processor Interface
• Manufacturer: DAVICOM [Davicom Semiconductor, Inc.]

8.10 10BASE-T Configuration/Status (10BTCSR) - 18
8.11 (Specified config) Register – 20
Preliminary
Version: DM9008AEP-DS-P03
Dec. 14, 2006
18.15
18.14
18.13
18.12
18.11
18.10
20.15
20.14
20.13
18.9-
18.1
18.0
Bit
Bit
FORCE_TXSD
SQUELCH
Bit Name
Reserved
Reserved
Reserved
JABEN
Bit Name
LP_EN
POLR
TSTSE1
TSTSE2
HBE
Default
1, RW
1, RW
1, RW
0, RW
0, RO
0, RO
0, RO
1,RW
Default
0,RW
0,RW
0,RW
Reserved
Read as 0, ignore on write
Link Pulse Enable
1 = Transmission of link pulses enabled
0 = Link pulses disabled, good link condition forced
This bit is valid only in 10Mbps operation
Heartbeat Enable
1 = Heartbeat function enabled
0 = Heartbeat function disabled
When the DM9008A is configured for full duplex operation, this
bit will be ignored (the collision/heartbeat function is invalid in
full duplex mode)
Squelch Enable
1 = Normal squelch
0 = Low squelch
Jabber Enable
Enables or disables the Jabber function when the DM9008A is in
10BASE-T full duplex or 10BASE-T transceiver Loopback
mode
1 = Jabber function enabled
0 = Jabber function disabled
Reserved
Force to 0, in application.
Reserved
Read as 0, ignore on write
Polarity Reversed
When this bit is set to 1, it indicates that the 10Mbps cable
polarity is reversed. This bit is automatically set and cleared by
10BASE-T module
Vendor test select control
Vendor test select control
Force Signal Detect
1: force SD signal OK in 100M
Ethernet Controller with General Processor Interface
Description
Description
DM9008AEP
36