BT8375 CONEXANT [Conexant Systems, Inc], BT8375 Datasheet - Page 36

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BT8375

Manufacturer Part Number
BT8375
Description
single chip transceivers for T1/E1 and Integrated Service Digital Network (ISDN) primary rate interfaces
Manufacturer
CONEXANT [Conexant Systems, Inc]
Datasheet

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2.0 Circuit Description
2.2 Receive Line Interface Unit
2.2.2 Clock Recovery
Figure 2-7. Receive Input Jitter Tolerance
2-8
2.2.2.1 Phase Locked
10000
1000
100
0.1
10
1
0.1
138 UI
Loop
Data Jitter
Tolerance
Reg. G. 823 (E1)
Min. Tolerance
Min. Tolerance
Min. Tolerance
1
TR 62411 (T1)
The Receive Phase Locked Loop (RPLL) recovers the line rate clock from the
Data Slicer dual rail outputs. The RPLL generates a recovered clock that tracks
the jitter in the data from the Data Slicer, and sustains the data-to-clock phase
relationship in the absence of incoming pulses.
LIU’s input clock and data jitter tolerance.
G. 824 (T1)
Sine Wave Jitter Frequency (Hz) [Log Scale]
10
1.5 UI
28 UI
5 UI
Conexant
100
1000
Fully Integrated T1/E1 Framer and Line Interface
10000
Clock Jitter
Tolerance
Figure 2-7
0.1UI
0.2UI
0.35 UI
.22 UI
100000
illustrates the Receive
Bt8370/8375/8376
N8370DSE

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