BT8375 CONEXANT [Conexant Systems, Inc], BT8375 Datasheet - Page 224

• Manufacturer Part Number: BT8375
• Description: single chip transceivers for T1/E1 and Integrated Service Digital Network (ISDN) primary rate interfaces
• Manufacturer: CONEXANT [Conexant Systems, Inc]

3.16 Data Link Registers
WORD0: Message Status
EOM[1, 0]
RDL2_CNT[5:0]
WORD1: Message Data
RDL2[7:0]
3-106
0B3—Receive Data Link FIFO #2 (RDL2)
RDL2[7]
EOM[1]
7
7
NOTE:
Two different read byte values are supplied: WORD0 equals message status, and WORD1
equals message data. The processor determines which byte value is located in the FIFO by first
reading the receiver data link status [RDL2_STAT; addr 0B4]. In some cases, multiple
consecutive status bytes can be placed in the FIFO, so the processor must always read
RDL2_STAT before reading RDL2 to distinguish between WORD0 and WORD1 byte values.
However, each time a non-0 byte count [RDL2_CNT] status is read, the processor is
guaranteed that the next byte read from RDL2 is message data [WORD1], not message status.
Status byte and a message data byte each occupies 1 byte of FIFO space.
End of Message—The receive data link reports an End of Message status for each occurrence
of a complete (Good), a continued (Partial), an errored (FCS/Non-integer), or an aborted
(Abort) message. Properly received unformatted messages are reported with a Partial end of
message status. The processor responds to Good or Partial status by reading the indicated
number of data bytes [RDL2_CNT] from RDL2. For abort or error cases, RDL2_CNT equals
0 to indicate all received data from that message was discarded.
the receiver is in progress of filling the FIFO (in which case RDL2_STAT contains RSTAT2=1
and RMSG2=1). If an abort or error status with 0 byte count is reported after the processor has
buffered a prior HDLC Partial message, that partial buffered processor data must be discarded.
Abort status is reported if the receiver detects a string of 7 or more consecutive 1s during an
HDLC message. FCS error status is reported if FCS mode is enabled and the checksum
calculated over the received HDLC message does not match the received 16-bit FCS.
Non-integer error status is reported if the receiver detects a closing FLAG character that yields
an HDLC message length which is not an integer number of 8-bit octets.
Byte Count [5:0]—Indicates the number of Message Data [WORD1] bytes stored in
subsequent consecutive FIFO locations, constituting one received message. The reported byte
count is the actual number of bytes from 0 to 63, where 0 indicates 0 bytes for the processor to
read. The processor can read either the specified number of message data bytes consecutively
from RDL2, or poll RDL2_STAT after reading each data byte until RDL2_STAT reports an
end of message (i.e., RMPTY2=1 or RSTAT2=1).
Receive Message Data—Filled by the receiver data link, from LSB to MSB, with bits from the
selected channel. The processor reads 8-bit FIFO data during HDLC and Pack8 modes. During
Pack6 mode, only the 6 least significant bits RDL2[5:0] are filled.
RDL2[6]
EOM[0]
Note that A Good status with RDL2_CNT=0 is reported if the processor reads RDL2 while
6
6
Not available in Bt8376 device.
RDL2_CNT[5]
RDL2[5]
5
5
00 = Good
01 = FCS/Non-integer
10 = Abort
11 = Partial
RDL2_CNT[4]
RDL2[4]
4
4
Conexant
RDL2_CNT[3]
RDL2[3]
3
3
Fully Integrated T1/E1 Framer and Line Interface
RDL2_CNT[2]
RDL2[2]
2
2
RDL2_CNT[1]
RDL2[1]
Bt8370/8375/8376
1
1
RDL2_CNT[0]
N8370DSE
RDL2[0]
0
0