H55S1G22MFP-60 HYNIX [Hynix Semiconductor], H55S1G22MFP-60 Datasheet - Page 5

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H55S1G22MFP-60

Manufacturer Part Number
H55S1G22MFP-60
Description
1Gb (32Mx32bit) Mobile SDRAM
Manufacturer
HYNIX [Hynix Semiconductor]
Datasheet

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FEATURES
1Gb SDRAM ORDERING INFORMATION
Rev 1.2 / Jun. 2008
- All the commands registered on positive edge of basic input clock (CLK)
- During burst Read or Write operation, burst Read or Write for a different bank is performed.
- During burst Read or Write operation, a different bank is activated and burst Read or Write
- During auto precharge burst Read or Write, burst Read or Write for a different bank is performed
- Programmable PASR(Partial Array Self Refresh)
- Auto TCSR (Temperature Compensated Self Refresh)
- Programmable DS (Drive Strength)
- Deep Power Down Mode
- -30
- 90 Ball Lead Free FBGA
Operation Temperature
Standard SDRAM Protocol
Clock Synchronization Operation
MULTIBANK OPERATION - Internal 4bank operation
Power Supply Voltage : VDD = 1.8V, VDDQ = 1.8V
LVCMOS compatible I/O Interface
Low Voltage interface to reduce I/O power
Programmable burst length: 1, 2, 4, 8 or full page
Programmable Burst Type : sequential or interleaved
Programmable CAS latency of 2 or 3
Programmable Drive Strength
Low Power Features
Package Type
for that bank is performed
H55S1G32MFP-60
H55S1G32MFP-75
H55S1G32MFP-A3
H55S1G22MFP-60
H55S1G22MFP-75
H55S1G22MFP-A3
Part Number
o
C ~ 85
o
C
Clock Frequency
166MHz
133MHz
105MHz
166MHz
133MHz
105MHz
2kBytes
4kBytes
Page
Size
1Gbit (32Mx32bit) Mobile SDR Memory
4banks x 8Mb x 32
Organization
H55S1G(2/3)2MFP Series
Interface
LVCMOS
90 Ball FBGA
Package
11
5

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