H55S1G22MFP-60 HYNIX [Hynix Semiconductor], H55S1G22MFP-60 Datasheet - Page 37

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H55S1G22MFP-60

Manufacturer Part Number
H55S1G22MFP-60
Description
1Gb (32Mx32bit) Mobile SDRAM
Manufacturer
HYNIX [Hynix Semiconductor]
Datasheet

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Command
CLK
Address
DQ
Command
Address
CLK
DQ
WRITE to PRECHARGE
Data for any WRITE burst may be followed by a subsequent PRECHARGE command to the same bank (provided Auto
Precharge was not activated). When the precharge command is executed for the same bank as the write command
that preceded it, the minimum interval between the two commands is 1 clock. However, if the burst write operation is
unfinished, the input data must be masked by means of DQM for assurance of the clock defined by tDPL. To follow a
WRITE without truncating the WRITE burst, tDPL should be met as shown in Fig.
Data for any WRITE burst may be truncated by a subsequent PRECHARGE command as shown in Figure.
Note that only data-inthat are registered prior to the t
data-in should be masked with DM, as shown in next Fig. Following the PRECHARGE command, a subsequent com-
mand to the same bank cannot be issued until tRP is met.
Rev 1.2 / Jun. 2008
WRITE
BA, Col
WRITE
BA, Col
D
D
I
b
I
b0
b
b0
D
D
I
I
b1
b1
tDPL
D
D
IO
IO
b2
b2
PRE
D
Non-Interrupting Write to Precharge
I
b3
Interrupting Write to Precharge
DPL
tDPL
period are written to the internal array, and any subsequent
1Gbit (32Mx32bit) Mobile SDR Memory
PRE
H55S1G(2/3)2MFP Series
CL = 2 or 3
CL = 2 or 3
BL = 4
BL = 4
11
37

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