MT9LSDT1672G-10E MICRON [Micron Technology], MT9LSDT1672G-10E Datasheet - Page 10

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MT9LSDT1672G-10E

Manufacturer Part Number
MT9LSDT1672G-10E
Description
SYNCHRONOUS DRAM MODULE
Manufacturer
MICRON [Micron Technology]
Datasheet
8, 16 Meg x 72 PC133/PC100 Registered SDRAM DIMMs
ZM28_3.p65 – Rev. 4/00
to ensure compatibility
with future devices.
M11, M10 = “0, 0”
*Should program
Unused
12
Reserved*
11
A11
Mode Register Definition
10
A10
WB
M9
0
1
9
A9
Op Mode
8
A8
7
A7
Programmed Burst Length
M8
0
Figure 4
-
Single Location Access
CAS Latency
6
Write Burst Mode
A6
5
M7
A5
0
-
4
A4
BT
M3
Defined
0
1
M6-M0
3
A3
-
M2
M6
0
0
0
0
1
1
1
1
0
0
0
1
1
1
1
Burst Length
2
M1
A2
M5
0
0
1
1
0
0
1
1
0
1
1
0
0
1
1
M0
M4
1
Operating Mode
Standard Operation
All other states reserved
0
1
0
1
0
1
0
1
0
0
1
0
1
0
1
A1
0
A0
Reserved
Reserved
Reserved
Full Page
M3 = 0
Interleaved
Burst Type
Sequential
1
2
4
8
Mode Register (Mx)
Address Bus
Burst Length
CAS Latency
Reserved
Reserved
Reserved
Reserved
Reserved
2
3
Reserved
Reserved
Reserved
Reserved
M3 = 1
1
2
4
8
10
NOTE: 1. For full-page accesses: y = 1,024 (128MB), y = 512
Length
Burst
Page
Full
(y)
2
4
8
2. For a burst length of two, A1-A9/A8 select the
3. For a burst length of four, A2-A9/A8 select the
4. For a burst length of eight, A3-A9/A8 select the
5. For a full-page burst, the full row is selected and
6. Whenever a boundary of the block is reached
7. For a burst length of one, A0-A9/A8 select the
REGISTERED SDRAM DIMMs
(64MB)
block of two burst; A0 selects the starting column
within the block.
block of four burst; A0-A1 select the starting
column within the block.
block of eight burst; A0-A2 select the starting
column within the block.
A0-A9/A8 select the starting column.
within a given sequence above, the following
access wraps within the block.
unique column to be accessed, and Mode Register
bit M3 is ignored.
Starting Column
(location 0-y)
A2 A1 A0
0
0
0
0
1
1
1
1
n = A0-9/8
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Address
A1 A0
0
0
1
1
0
0
1
1
0
0
1
1
Burst Definition
A0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Table 1
Type = Sequential
Cn, Cn+1, Cn+2
0-1-2-3-4-5-6-7
1-2-3-4-5-6-7-0
2-3-4-5-6-7-0-1
3-4-5-6-7-0-1-2
4-5-6-7-0-1-2-3
5-6-7-0-1-2-3-4
6-7-0-1-2-3-4-5
7-0-1-2-3-4-5-6
Cn+3, Cn+4...
Order of Accesses Within a Burst
…Cn-1,
0-1-2-3
1-2-3-0
2-3-0-1
3-0-1-2
Cn…
8, 16 MEG x 72
0-1
1-0
Type = Interleaved
©1999, Micron Technology, Inc.
Not supported
0-1-2-3-4-5-6-7
1-0-3-2-5-4-7-6
2-3-0-1-6-7-4-5
3-2-1-0-7-6-5-4
4-5-6-7-0-1-2-3
5-4-7-6-1-0-3-2
6-7-4-5-2-3-0-1
7-6-5-4-3-2-1-0
ADVANCE
0-1-2-3
1-0-3-2
2-3-0-1
3-2-1-0
0-1
1-0

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