27C040 FAIRCHILD [Fairchild Semiconductor], 27C040 Datasheet - Page 8

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27C040

Manufacturer Part Number
27C040
Description
4,194,304-Bit (512K x 8) High Performance CMOS EPROM
Manufacturer
FAIRCHILD [Fairchild Semiconductor]
Datasheet

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NM27C040 Rev. C.1
Functional Description
ERASURE CHARACTERISTICS
The erasure characteristics of the device are such that erasure
begins to occur when exposed to light with wavelengths shorter
than approximately 4000 Angstroms (Å). It should be noted that
sunlight and certain types of fluorescent lamps have wavelengths
in the 3000Å–4000Å range.
The recommended erasure procedure for the EPROM is expo-
sure to short wave ultraviolet light which has a wavelength of
2537Å. The integrated dose (i.e., UV intensity X exposure time) for
erasure should be minimum of 15W-sec/cm
The EPROM should be placed within 1 inch of the lamp tubes
during erasure. Some lamps have a filter on their tubes which
should be removed before erasure.
An erasure system should be calibrated periodically. The distance
from lamp to device should be maintained at one inch. The erasure
time increase as the square of the distance from the lamp. (If
distance is doubled the erasure time increases by factor of 4.)
Lamps lose intensity as they age. When a lamp is changed, the
distance has changed, or the lamp has aged, the system should
Mode Selection
The modes of operation of the NM27C040 are listed in Table 1. A single 5V power supply is required in the read mode. All inputs are
TTL levels except for V
Note 15: X can be V
Manufacturer Code
Device Code
Mode
Read
Output Disable
Standby
Programming
Program Verify
Program Inhibit
Pins
IL
or V
IH
(12)
PP
A0
V
V
IH
IL
and A9 for device signature.
Pins
(26)
12V
12V
A9
TABLE 2. Manufacturer’s Identification Code
(Continued)
(21)
2
O7
.
1
0
CE/PGM
TABLE 1. Modes Selection
V
V
V
V
X
X
IH
IH
IL
IL
(20)
O6
0
0
(19)
O5
0
0
8
OE
V
V
V
V
V
be checked to make certain full erasure is occurring. Incomplete
erasure will cause symptoms that can be misleading. Program-
mers, components, and even system designs have been errone-
ously suspected when incomplete erasure was the problem.
SYSTEM CONSIDERATION
The power switching characteristics of EPROMs require careful
decoupling of the devices. The supply current, I
segments that are of interest to the system designer: the standby
current level, the active current level, and the transient current
peaks that are produced by voltage transitions on input pins. The
magnitude of these transient current peaks is dependent of the
output capacitance loading of the device. The associated V
transient voltage peaks can be suppressed by properly selected
decoupling capacitors. It is recommended that at least a 0.1 F
ceramic capacitor be used on every device between V
GND. This should be a high frequency capacitor of low inherent
inductance. In addition, at least a 4.7 F bulk electrolytic capacitor
should be used between V
bulk capacitor should be located near where the power supply is
connected to the array. The purpose of the bulk capacitor is to
overcome the voltage drop caused by the inductive effects of the
PC board traces.
X
IH
IH
IH
IL
IL
(18)
O4
0
0
(Note 15)
(17)
12.75V
12.75V
12.75V
O3
V
1
1
X
X
X
PP
CC
(15)
O2
1
0
and GND for each eight devices. The
6.25V
6.25V
6.25V
V
5.0V
5.0V
5.0V
(14)
O1
CC
1
0
(13)
O0
www.fairchildsemi.com
1
0
Outputs
CC
High Z
High Z
High Z
, has three
D
D
D
OUT
OUT
IN
Data
Hex
CC
8F
08
and
CC

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