IDT72V8980PV IDT, Integrated Device Technology Inc, IDT72V8980PV Datasheet - Page 6

• Manufacturer Part Number: IDT72V8980PV
• Description: IC DGTL SW 256X256 48-SSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: 72Vr
• Type: Multiplexerr

Specifications of IDT72V8980PV

• Circuit: 1 x 8:8
• Independent Circuits: 1
• Voltage Supply Source: Single Supply
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-SSOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Current - Output High, Low: -
• Other names: 72V8980PV

TABLE 3 — CONTROL REGISTER CONFIGURATION
TABLE 4 — CONNECTION MEMORY HIGH REGISTER
NOTE:
1. If bit 2 of the corresponding Connection HIGH location is 1 or bit 6 of the Control Register is 1, then these entire 8 bits are output on the channel and stream associated with
TABLE 5 — CONNECTION MEMORY LOW REGISTER
IDT72V8980 3.3V Time Slot Interchange
Digital Switch 256 x 256
7-5
4-0
this location. Otherwise, the bits are used as indicated to define the source of the connection which is output on the channel and stream associated with this location.
Bit
Bit
4-3
2-0
Bit
2
1
0
7
6
5
(1)
(1)
CS (Channel Source)
CCO (CCO Bit)
OE (Output Enable)
Stream Address Bits*
Channel Address Bits*
SM (Split Memory)
PE (Processor Mode)
MS1-MS0
(Memory Select Bits)
STA2-0
(Stream Address Bits)
Name
Name
Name
When 1, all subsequent reads are from the Data Memory and writes are to the Connection Memory LOW, except
when the Control Register is accessed again. When 0, the Memory Select bits specify the memory for the
operations. In either case, the Stream Address Bits select the subsection of the memory which is made available.
When 1, the contents of the Connection Memory LOW are output on the Serial Output streams except when the ODE
pin is LOW. When 0, the Connection Memory bits for each channel determine what is output.
unused
0-0 - Not to be used.
0-1 - Data Memory (read only from the microprocessor port)
1-0 - Connection Memory LOW
1-1 - Connection Memory is HIGH
The number expressed in binary notation on these bits refers to the input or output stream which corresponds to the
subsection of memory made accessible for subsequent operations.
When 1, the contents of the corresponding location in Connection Memory LOW are output on the location's channel
and stream. When 0, the contents of the corresponding location in Connection Memory LOW act as an address for the
Data Memory and determine the source of the connection to the location's channel and stream.
This bit is output on the CCO pin one channel early. The CCO bit for stream 0 is output first.
If the ODE pin is HIGH and bit 6 of the Control Register is 0, then this bit enables the output drive for the location's
channel and stream. This allows individuals channels on individuals streams to be made high-impedance, allowing
switching matrices to be constructed. A 1 enables the driver and a 0 disables it.
The number expressed in binary notation on these 3 bits are the number of the stream for the source of the connection.
Bit 7 is the most significant bit, e.g., If bit 7 is 1, bit 6 is 0 and bit 5 is 0 then the source of the connection is a channel on
RX4.
The number expressed in binary notation on these 5 bits is the number of the channel which is the source of the
connection (the stream where the channel lies is defined by bits 7, 6 and 5). Bit 4 is the most significant bit, e.g., if bit 4
is 1, bit 3 is 0, bit 2 is 0, bit 1 is 1 and bit 0 is 1, then the source of the connection is channel 19.
Mode Control
No Corresponding Memory
- These bits give 0s if read
Stream Address Bits
7
7
7
Bits
6
6
6
(unused)
5
5
5
6
Memory Select
4
4
4
Bits
Channel Address Bits
3
3
3
Description
Description
Description
Per Channel Control Bits
Stream Address Bits
2
2
2
1
1
1
0
0
0
Commercial Temperature Range