IDT72V8980PV IDT, Integrated Device Technology Inc, IDT72V8980PV Datasheet - Page 3

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IDT72V8980PV

Manufacturer Part Number
IDT72V8980PV
Description
IC DGTL SW 256X256 48-SSOP
Manufacturer
IDT, Integrated Device Technology Inc
Series
72Vr
Type
Multiplexerr
Datasheet

Specifications of IDT72V8980PV

Circuit
1 x 8:8
Independent Circuits
1
Voltage Supply Source
Single Supply
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-SSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Current - Output High, Low
-
Other names
72V8980PV
PIN DESCRIPTIONS
SYMBOL
IDT72V8980 3.3V Time Slot Interchange
Digital Switch 256 x 256
GND
V
DTA
RX0-7
F0i
C4i
A0-A5
DS
R/W
CS
D0-D7
TX0-7
ODE
CCO
RESET
CC
Ground.
V
Data Acknowledgment
(Open Drain)
RX Input 0 to 7
Frame Pulse
Clock
Address 0 to 5
Data Strobe
Read/Write
Chip Select
Data Bus 0 to 7
TX Outputs 0 to 7
Output Drive Enable
Control Channel Output
Device Reset
(Schmitt Trigger Input)
CC
NAME
I/O
I/O These pins provide microprocessor access to data in the internal control register. Connection Memory HIGH,
O
O
O
I
I
I
I
I
I
I
I
I
This active LOW output indicates that a data bus transfer is complete. A pull-up resistor is required at this
Serial data output streams. These streams are composed of 32, 64 Kbit/s channels at data rates of 2.048 Mb/s.
This is an output enable for the TX0-7 serial outputs. If this input is LOW, TX0-7 are high-impedance. If this is
This output is a 2.048 Mb/s line which contains 256 bits per frame. The level of each bit is controlled by the
Ground Rail.
+3.3 Volt Power Supply.
output.
Serial data input streams. These streams have 32 channels at data rates of 2.048 Mb/s.
This input identifies frame synchronization signals formatted to ST-BUS
4.096 MHz serial clock for shifting data in and out of the data streams.
These lines provide the address to IDT72V8980 internal registers.
This is the input for the active HIGH data strobe on the microprocessor interface. This input operates with
CS to enable the internal read and write generation.
This input controls the direction of the data bus lines (D0-D7) during a microprocessor access.
Active LOW input enabling a microprocessor read or write of control register or internal memories.
Connection Memory LOW and data memory.
HIGH, each channel may still be put into high-impedance by software control.
contents of the CCO bit in the Connection Memory HIGH locations.
This input (active LOW) puts the IDT72V8980 in its reset state that clears the device internal counters,
registers and brings TX0-7 and microport data outputs to a high-impedance state. The time constant for a
power up reset circuit must be a minimum of five times the rise time of the power supply. In normal operation,
the RESET pin must be held LOW for a minimum of 100ns to reset the device.
3
DESCRIPTION
Commercial Temperature Range
®
specifications.

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