S71PL512ND0JAW5B0 SPANSION [SPANSION], S71PL512ND0JAW5B0 Datasheet - Page 78

• Manufacturer Part Number: S71PL512ND0JAW5B0
• Description: Two S29PL256N Devices (32 M x 16-Bit) CMOS 3.0-Volt only Simultaneous Read/Write, Page-Mode Flash Memory
• Manufacturer: SPANSION [SPANSION]

16 Revisions
76
Revision A0 (February 28, 2005)
Revision A1 (August 8, 2005)
Revision A2 (October 25, 2005)
Initial Release
Performance Characteristics
Updated Package Options
MCP Look-Ahead Connection Diagram
Corrected Pinout
Memory Map
Added Sector and Memory Address Map for S29PL127N
Device Operation Table
Added Dual Chip Enable Device Operation Table
V
Updated t
Added V
DC Characteristics
Updated typical and maximum values.4
Global
Changed data sheet status from Advance Information to Preliminary.
Removed Byte Address Information
Distinctive and Performance Characteristics
Removed Enhanced VersatileI/O, updated read access times, and Package options.
Logic Symbol and Block Diagram
Removed V
Erase and Programming Performance
Updated table.
Write Buffer Programming
Updated Write Buffer Abort Description.
Operating Ranges
Updated V
DC characteristics
Updated I
CC
Power Up
CC
VCS
CC1
IO
ramp rate restriction
IO
supply voltages.
.
, I
from Logic Symbol and Block Diagram.
CC4
, I
CC6
.
S29PL-N MirrorBit™ Flash Family
P r e l i m i n a r y
S29PL-N_M0_A4 November 23, 2005