S71PL512ND0JAW5B0 SPANSION [SPANSION], S71PL512ND0JAW5B0 Datasheet - Page 15
S71PL512ND0JAW5B0
Manufacturer Part Number
S71PL512ND0JAW5B0
Description
Two S29PL256N Devices (32 M x 16-Bit) CMOS 3.0-Volt only Simultaneous Read/Write, Page-Mode Flash Memory
Manufacturer
SPANSION [SPANSION]
Datasheet
1.S71PL512ND0JAW5B0.pdf
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6
A
Notes:
1.
2.
3.
November 23, 2005 S29PL-N_M0_A4
max
RESET#
RY/BY# is an open drain output.
A
PL129N has two CE# pins CE1# and CE2#.
A2–A0
max
WE#
OE#
– A3
CE#
Block Diagram
V
V
= A23 (PL256N), A22 (PL127N), A21 (PL129N).
CC
SS
Command
V
Register
CC
Control
State
RY/BY# (See Note)
Detector
Timer
P r e l i m i n a r y
PGM Voltage
Generator
S29PL-N MirrorBit™ Flash Family
Erase Voltage
Generator
Switches
Sector
Output Enable
Chip Enable
X-Decoder
Logic
Y-Decoder
Input/Output
DQ15–DQ0
Buffers
Data Latch
Cell Matrix
Y-Gating
13
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