S71PL512ND0JAW5B0 SPANSION [SPANSION], S71PL512ND0JAW5B0 Datasheet - Page 66

• Manufacturer Part Number: S71PL512ND0JAW5B0
• Description: Two S29PL256N Devices (32 M x 16-Bit) CMOS 3.0-Volt only Simultaneous Read/Write, Page-Mode Flash Memory
• Manufacturer: SPANSION [SPANSION]

64
Addresses
Note:
Addresses
RY/BY#
CE#
WE#
WE#
Data
Data
OE#
OE#
V
CE#
SA = sector address (for Sector Erase), VA = Valid Address for reading status data (see
CC
WE# Controlled Write Cycle
t
t
AS
VCS
t
WPH
t
Erase Command Sequence (last two cycles)
CS
Figure 13.12 Back-to-back Read/Write Cycle Timings
2AAh
Valid PA
t
Figure 13.11 Chip/Sector Erase Operation Timings
WC
t
t
WC
t
WP
AH
t
DS
S29PL-N MirrorBit™ Flash Family
t
Valid
WP
t
DS
In
55h
t
DH
t
t
DH
CH
t
555h for chip erase
OEH
t
WPH
P r e l i m i n a r y
Valid RA
t
SR/W
t
t
ACC
RC
t
t
CE
AS
SA
t
OE
10 for Chip Erase
Read Cycle
t
AH
Valid
Out
t
30h
OH
t
DF
t
GHWL
t
BUSY
t
WC
Valid PA
t
WHWH2
Valid
CE# Controlled Write Cycles
Read Status Data
In
S29PL-N_M0_A4 November 23, 2005
VA
Write Operation
t
CPH
t
AS
Status
Valid PA
t
WC
VA
t
Valid
AH
t
Status)
CP
In
D
t
OUT
RB