ZL50408GDC ZARLINK [Zarlink Semiconductor Inc], ZL50408GDC Datasheet - Page 67
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ZL50408GDC
Manufacturer Part Number
ZL50408GDC
Description
Managed 8-Port 10/100M 1-Port 10/100/1000M Ethernet Switch
Manufacturer
ZARLINK [Zarlink Semiconductor Inc]
Datasheet
1.ZL50408GDC.pdf
(132 pages)
- Current page: 67 of 132
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13.3.1.2
I²C Address: 00A+n; CPU Address:0001+2n (n = port number)
Accessed by CPU and I²C (R/W)
ECR2Pn: Port n Control Register
Bit [0]:
Bit [1]:
Bit [2]:
Bit [3]:
Bit [4]
Bit [5]
Filter untagged frame
0: Disable (Default)
1: All untagged frames from this port are discarded or follow security option when
security is enable
0: Disable (Default)
1: All tagged frames from this port are discarded or follow security option when
security is enable
Learning Disable
0: Learning is enabled on this port (Default)
1: Learning is disabled on this port
0: 10 microsecond refreshing time (Default)
1: 1 millisecond refreshing time
Reserved, Must be 0.
Do not change VLAN tag. This control over PVMAPnn_3 bit [2]. If this bit is set, no
tag will be replaced nor removed. (Default 0)
1: Enable
0: Disable
Filter Tag frame
Rate control timer select
Zarlink Semiconductor Inc.
ZL50408
67
Data Sheet
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