ADE3000SXT STMicroelectronics, ADE3000SXT Datasheet - Page 34

• Manufacturer Part Number: ADE3000SXT
• Description: LCD Display Engines with Integrated DVI/ ADC and YUV Ports
• Manufacturer: STMicroelectronics

Sync Measurement Block
34/88
SMEAS_V_CTRL
SMEAS_H_SEL
Register Name
Table 13: Sync Measurement Registers (Sheet 3 of 8)
0x0112
0x0113
Addr
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Mode
[7]
[6]
[5]
[4]
[3]
[2]
[1]
[0]
[7:4]
[3:0]
Bits Default
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
Reserved
Enable Interlace Measurement
Measure odd frame from YUV only. Applies
only if the odd signal from YUV is present.
The results in SMEAS_XCLKS_PER_H and
SMEAS_H_PER_V are updated for odd
frames if this bit is set.
Enable Vertical Measurement in Free-
running mode.
Vertical Event Edge select
0: positive edge
1: negative edge
Freeze Vertical Measurement results in
Free-running mode. No meaning in One-shot
mode.
0: Do not freeze the results. New result will
be available on the next and subsequent
toggle of the polling bit.
1: Freeze the current results in Free-running
mode. The polling bit will still toggle and the
block continues to free run; however, results
will not be updated.
Vertical measurement start.
In One-shot mode, this bit triggers the start
of a measurement. The bit is reset to zero
when the measurement is complete.
Vertical measurement mode
0: Free-running
1: One-shot
Reserved
Select a horizontal sync, enable or clock for
measurement.
0x0: Analog hsync
0x1: Hsync generated from LLPLL
0x2: SOG from csync pin
0x3: DVI hsync
0x4: YUV hsync
0x5: DVI data enable
0x6: YUV data enable
0x7: DVIclk div1k
0x8: YUVclk div1k
0x9: TCON hsync
0xA: TCON data enable
0xB: INCLK div1k
0xC: DOTCLK div1k
0xD-0xF: Reserved
Description
ADE3XXX