ADE3000SXT STMicroelectronics, ADE3000SXT Datasheet - Page 29

• Manufacturer Part Number: ADE3000SXT
• Description: LCD Display Engines with Integrated DVI/ ADC and YUV Ports
• Manufacturer: STMicroelectronics

ADE3XXX
2.7
YUV_CTRL
YUV_STATUS
YUV Block
The TV video input module is used to interface external TV video decoder chip. It handles VESA
Video Interface Port(VIP) 8-bit/16-bit YC
and double clock edge input RGB data formats. It extracts embedded sync timing and converts data
into RGB color space. All the functions in this module are controlled by the system microcontroller
through I2C registers.
The following table describes the different pin configurations for YUV/RGB digital input.
X = don’t care
CCIR656
VMI
VIP 8b
VIP 16b
RGB Posedge
RGB Negedge
Register Name
Mode
{RED[3:0],GREEN[7:4]}
YUV[7:0]
DATA[7:0]
DATA[7:0]
DATA[7:0]
DATA[7:0]
BLUE[7:0]
Table 11: YUV Registers (Sheet 1 of 2)
0x0700
0x0701
Addr
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Mode
B
C
R
, VMI/ ITU-R Recommendation 656 (CCIR656) YC
[7:6]
[5]
[4]
[3]
[2]
[1]
[0]
[7]
[6]
[5]
[4]
[3]
[2]
[1]
[0]
Bits
TCON[3:0]
GREEN[3:0]
DATA[11:8]
RED[7:4]
X
X
X
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
Default
Reserved
0: Rising edge of clock
1: Falling edge of clock
Input Source of Color Space Converter
0: YUV pins
1: ADC
Color Space Converter Enable
Sync Decoder Enable
Sample Input Data Rate
0:1x
1: 2x
Status Reset
Reserved
SAV detected
EAV detected
ANC detected
TASK detected
FIELDID detected
HSYNC detected
VSYNC detected
Writing to this register will clear all bits.
{HREF, VREF, VACTIVE, X}
{HSYNC,VSYNC,DE,X}
{HSYNC,VSYNC,DE,X}
TCON[7:4]
DATA[15:12]
Description
X
X
YUV Block
29/88
B
C
R