ADE3000SXT STMicroelectronics, ADE3000SXT Datasheet - Page 15

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ADE3000SXT

Manufacturer Part Number
ADE3000SXT
Description
LCD Display Engines with Integrated DVI/ ADC and YUV Ports
Manufacturer
STMicroelectronics
Datasheet
ADE3XXX
GLBL_CLK_SRC_SEL_2
GLBL_CLK_INV
GLBL_ANA_PWR
GLBL_XK_SRST
GLBL_I2C_CTRL
GLBL_XTAL_CTRL
Register Name
Table 4: Global Registers (Sheet 2 of 4)
0x0002
0x0003
0x0005
0x0006
0x0007
0x0008
Addr.
Mode
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bits
[6:4]
[2:0]
[7:5]
[7:3]
[7:3]
[7:1]
[3]
[6]
[5]
[4]
[3]
[2]
[1]
[0]
[4]
[3]
[2]
[1]
[0]
[2]
[1]
[0]
[2]
[1]
[0]
[0]
[7]
[7]
Default
0x0
0x4
0x4
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x1
0x1
0x1
0x1
0x1
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x1
Reserved
LLK CTRL CLK source
0x0: YUVCLK pin
0x1: SCLK freq synth
0x2: LLKPLL control clock (normal)
0x3: CLKIN pin
0x4: crystal clock
0x5: 0
0x6 - 0x7: Reserved
Reserved
LLK ZERO CLK source
0x0: YUVCLK pin
0x1: SCLK freq synth
0x2: LLKPLL zero clock (normal)
0x3: CLKIN pin
0x4: crystal clock
0x5: 0
0x6 - 0x7: Reserved
Reserved
Invert YUV clock
Invert DVI detect clock
Invert ADC clock
Invert LLPLL zero clock
Invert LLPLL ctrl clock
Invert DOT clock
Invert input clock
Reserved
Blue ADC power down
Green ADC power down
Red ADC power down
DVI detect clock power down
DVI PLL power down
Reserved
SMEAS block reset, synchronous to XCLK
SRT block reset, synchronous to XCLK
Frame sync block reset, synchronous to
XCLK
Reserved
Disable I2C auto increment
SDA PMOS enable
Bypass I2C filter
Reserved
Crystal Oscillator Enable
Description
Global Control Block
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