SCAN182373ASSCX Fairchild Semiconductor, SCAN182373ASSCX Datasheet - Page 4

• Manufacturer Part Number: SCAN182373ASSCX
• Description: IC TRANSPARENT LATCH 8BIT 56SSOP
• Manufacturer: Fairchild Semiconductor
• Series: SCANr

Specifications of SCAN182373ASSCX

• Logic Type: D-Type Transparent Latch
• Circuit: 9:9
• Output Type: Tri-State
• Voltage - Supply: 4.5 V ~ 5.5 V
• Independent Circuits: 2
• Delay Time - Propagation: 4.5ns
• Current - Output High, Low: 32mA, 15mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 56-SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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Description of BOUNDARY-SCAN Circuitry
The scan cells used in the BOUNDARY-SCAN register are
one of the following two types depending upon their loca-
tion. Scan cell TYPE1 is intended to solely observe system
data, while TYPE2 has the additional ability to control sys-
tem data.
Scan cell TYPE 1 is located on each system input pin while
scan cell TYPE2 is located at each system output pin as
well as at each of the two internal active-high output enable
signals. AOE controls the activity of the A-outputs while
BOE controls the activity of the B-outputs. Each will acti-
vate their respective outputs by loading a logic high.
The BYPASS register is a single bit shift register stage
identical to scan cell TYPE1. It captures a fixed logic low.
Version Entity
MSB
0000
Bypass Register Scan Chain Definition
111111 0000001000 00000001111
SCAN182373A Product IDCODE
(32-Bit Code per IEEE 1149.1)
Number
Part
Logic 0
Manufacturer Required by
ID
1149.1
Scan Cell TYPE1
Scan Cell TYPE2
1
LSB
4
The INSTRUCTION register is an 8-bit register which cap-
tures the default value of 10000001 (SAMPLE/PRELOAD)
during the CAPTURE-IR instruction command. The benefit
of capturing SAMPLE/PRELOAD as the default instruction
during CAPTURE-IR is that the user is no longer required
to shift in the 8-bit instruction for SAMPLE/PRELOAD. The
sequence of: CAPTURE-IR
will update the SAMPLE/PRELOAD instruction. For more
information refer to the section on instruction definitions.
MSB
Instruction Register Scan Chain Definition
Instruction Code
LSB
00000000
10000001
10000010
00000011
01000001
01000010
00100010
10101010
All Others
11111111
EXIT1-IR
SAMPLE/PRELOAD
SAMPLE-OUT
EXTEST-OUT
SAMPLE-IN
Instruction
EXTEST
IDCODE
BYPASS
BYPASS
CLAMP
HIGH-Z
UPDATE-IR