SCAN182373ASSCX Fairchild Semiconductor, SCAN182373ASSCX Datasheet - Page 2

• Manufacturer Part Number: SCAN182373ASSCX
• Description: IC TRANSPARENT LATCH 8BIT 56SSOP
• Manufacturer: Fairchild Semiconductor
• Series: SCANr

Specifications of SCAN182373ASSCX

• Logic Type: D-Type Transparent Latch
• Circuit: 9:9
• Output Type: Tri-State
• Voltage - Supply: 4.5 V ~ 5.5 V
• Independent Circuits: 2
• Delay Time - Propagation: 4.5ns
• Current - Output High, Low: 32mA, 15mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 56-SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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Truth Tables
H
L
X
Z
Functional Description
The SCAN182373A consists of two sets of nine D-type
latches with 3-STATE standard outputs. When the Latch
Enable (ALE or BLE) input is HIGH, data on the inputs
(AI
latches are transparent, i.e., a latch output will change
state each time its input changes. When Latch Enable is
LOW, the latches store the information that was present on
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
LOW Voltage Level
(0–8)
High Impedance
HIGH Voltage Level
Immaterial
ALE
H
H
X
L
or BI
(0–8)
) enters the latches. In this condition the
†AOE
Inputs
H
L
L
L
1
AI (0–8)
H
X
L
X
AO (0–8)
AO
H
Z
L
0
2
AO
BO
†
power-up.
the inputs a set-up time preceding the HIGH-to-LOW tran-
sition of the Latch Enable. The 3-STATE standard outputs
are controlled by the Output Enable (AOE
When Output Enable is LOW, the standard outputs are in
the 2-state mode. When Output Enable is HIGH, the stan-
dard outputs are in the high impedance mode, but this
does not interfere with entering new data into the latches.
0
0
Inactive-to-active transition must occur to enable outputs upon
BLE
Previous AO before H-to-L transition of ALE
Previous BO before H-to-L transition of BLE
X
H
H
L
†BOE
Inputs
H
L
L
L
1
BI (0–8)
H
X
X
L
1
or BOE
BO (0–8)
1
BO
) input.
H
Z
L
0