EVAL-AD5383EB AD [Analog Devices], EVAL-AD5383EB Datasheet - Page 36

• Manufacturer Part Number: EVAL-AD5383EB
• Description: 32-Channel, 3 V/5 V, Single-Supply, 12-Bit, Voltage Output DAC
• Manufacturer: AD [Analog Devices]

AD5383
UTILIZING THE AD5383 FIFO
The AD5383 FIFO mode optimizes total system update rates in
applications where a large number of channels need to be
updated. FIFO mode is only available when parallel interface
mode is selected. The FIFO_EN pin is used to enable the FIFO.
The status of FIFO_EN is sampled during the initialization
sequence. Therefore, the FIFO status can only be changed by
resetting the device. In a telescope that provides for the cancel-
lation of atmospheric distortion, for example, a large number of
channels need to be updated in a short period of time. In such
FIFO DATA LOAD
CHNLS 0-31
GROUP A
GROUP A
1.28µs
11.5µs
CHNLS 32-63
GROUP B
1.28µs
11.5µs
FIFO DATA LOAD
TIME FOR GROUP A
OUTPUT UPDATE
GROUP C
CHNLS
GROUP B
64-95
Figure 44. Using FIFO Mode 320 Channels Updated in under 25 µs
TIME FOR GROUP B
OUTPUT UPDATE
GROUP D
CHNLS
96-127
TIME TO UPDATE 320 CHANNELS = 23µs
GROUP E
128-159
CHNLS
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GROUP F
160-191
CHNLS
systems, as many as 320 channels need to be updated within
25 µs to 30 µs. Three-hundred-twenty channels require the use
of 10 AD5383s. With FIFO mode enabled, the data write cycle
time is 40 ns; therefore each group consisting of 32 channels can
be fully loaded in 1.28 µs. In FIFO mode, a complete group of
32 channels updates in 11.5 µs. The time taken to update all 320
channels is 11.5 µs + 9 × 1.28 µs = 23 µs. Figure 44 shows the
FIFO operation scheme.
GROUP G
192-223
CHNLS
GROUP H
224-255
CHNLS
TIME FOR GROUP J
OUTPUT UPDATE
FIFO DATA LOAD
GROUP J
GROUP I
256-287
CHNLS
GROUP J
288-319
CHNLS
1.28µs
11.5µs