HYS64D128320GU-5-B Infineon, HYS64D128320GU-5-B Datasheet - Page 16

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HYS64D128320GU-5-B

Manufacturer Part Number
HYS64D128320GU-5-B
Description
184-Pin Unbuffered Dual-In-Line Memory Modules
Manufacturer
Infineon
Datasheet
Table 9
DC Input Logic High
DC Input Logic Low
Input Leakage Current
Output Leakage Current
1)
2) The relationship between the
3) For any pin under test input of 0 V
Data Sheet
Parameter
V
margins. However, in the case of
case where a device is implemented such that it supports SSTL_2 inputs but has no SSTL_2 outputs (such as a translator),
and therefore no
V
DDQ
DDQ
= 2.5 V,
+ 300 mV).
DC Operating Conditions (SSTL_2 Inputs)
T
A
= 70 C, Voltage Referenced to
V
DDQ
supply voltage connection, inputs must tolerate input overdrive to 3.0 V (High corner
V
Symbol
V
V
I
I
IL
OL
DDQ
IH (DC)
IL (DC)
V
IH (max.)
V
of the driving device and the
IN
V
(input overdrive), it is the
DDQ
min.
V
– 0.30
– 5
– 5
REF
+ 0.3 V. Values are shown per DDR SDRAM component
HYS[64/72]D[16x01/32x00/64x20][G/E]U-[5/6/7/8]-B
V
+ 0.15
SS
Values
18
max.
V
V
5
5
DDQ
REF
V
– 0.15
+ 0.3
V
REF
DDQ
of the receiving device is what determines noise
Unbuffered DDR SDRAM Modules
of the receiving device that is referenced. In the
Unit
V
V
A
A
Note/ Test Condition
2)
3)
3)
Electrical Characteristics
V1.1, 2003-07
1)

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