MC9328MXL ETC, MC9328MXL Datasheet - Page 68

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MC9328MXL

Manufacturer Part Number
MC9328MXL
Description
i.MX Integrated Portable System Processor
Manufacturer
ETC
Datasheet

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Specifications
68
3.17 I
The I
Direction, Slave Acknowledge, Data, Data Acknowledge, and STOP.
3.18 Synchronous Serial Interface
The transmit and receive sections of the SSI can be synchronous or asynchronous. In synchronous mode,
the transmitter and the receiver use a common clock and frame synchronization signal. In asynchronous
mode, the transmitter and receiver each have their own clock and frame synchronization signals.
Continuous or gated clock mode can be selected. In continuous mode, the clock runs continuously. In
gated clock mode, the clock functions only during transmission. The internal and external clock timing
diagrams are shown in Figure 56 through Figure 58 on page 70.
Normal or network mode can also be selected. In normal mode, the SSI functions with one data word of
I/O per frame. In network mode, a frame can contain between 2 and 32 data words. Network mode is
typically used in star or ring-time division multiplex networks with other processors or codecs, allowing
interface to time division multiplexed networks without additional logic. Use of the gated clock is not
allowed in network mode. These distinctions result in the basic operating modes that allow the SSI to
communicate with a wide variety of devices.
Ref No.
1
2
3
4
5
6
2
C communication protocol consists of seven elements: START, Data Source/Recipient, Data
2
C Module
Hold time (repeated) START condition
Data hold time
Data setup time
HIGH period of the SCL clock
LOW period of the SCL clock
Setup time for STOP condition
SDA
SCL
Parameter
Figure 54. Definition of Bus Timing for I
Table 28. I
1
MC9328MXL Advance Information, Rev. 5
5
2
C Bus Timing Parameter Table
2
3
Minimum
182.4
11.4
480
182
80
0
1.8V ± 0.10V
4
Maximum
171
2
C
Minimum
120
320
160
160
10
0
3.0V ± 0.30V
Freescale Semiconductor
Maximum
6
150
Unit
ns
ns
ns
ns
ns
ns

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