MC9328MXL ETC, MC9328MXL Datasheet - Page 51

• Manufacturer Part Number: MC9328MXL
• Description: i.MX Integrated Portable System Processor
• Manufacturer: ETC

Freescale Semiconductor
3.12.1 Command Response Timing on MMC/SD Bus
The card identification and card operation conditions timing are processed in open-drain mode. The card
response to the host command starts after exactly N
SET_RCA is also processed in the open-drain mode. The minimum delay between the host command and
card response is NCR clock cycles as illustrated in Figure 39. The symbols for Figure 39 through Figure 43
are defined in Table 19.
After a card receives its RCA, it switches to data transfer mode. As shown on the first diagram in
Figure 40, SD_CMD lines in this mode are driven with push-pull drivers. The command is followed by a
period of two Z bits (allowing time for direction switching on the bus) and then by P bits pushed up by the
responding card. The other two diagrams show the separating periods N
Symbol
CRC
D
Z
*
Table 19. State Signal Parameters for Figure 39 through Figure 43
Cyclic redundancy check bits (7 bits)
CMD
CMD
Card Active
Figure 39. Timing Diagrams at Identification Mode
S T
S T
High impedance state
Host Command
Host Command
Definition
Repetition
Content
Content
Data bits
MC9328MXL Advance Information, Rev. 5
CRC
CRC
E Z
E Z
ID
N
N
******
******
CR
ID
clock cycles. For the card address assignment,
Symbol
cycles
cycles
S
T
P
E
Z S T
Z S T
Identification Timing
SET_RCA Timing
CID/OCR
CID/OCR
Content
Content
Host Active
RC
One-cycle pull-up (1)
(Host = 1, Card = 0)
Transmitter bit
and N
Start bit (0)
Definition
End bit (1)
Z Z
Z Z
CC
Z
Z
.
Specifications
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